isa_traits.hh revision 5127:478b14ffee54 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *
9 * The software must be used only for Non-Commercial Use which means any
10 * use which is NOT directed to receiving any direct monetary
11 * compensation for, or commercial advantage from such use.  Illustrative
12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
16 * commercial advantage.
17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 *     Director of Intellectual Property Licensing
21 *     Office of Strategy and Technology
22 *     Hewlett-Packard Company
23 *     1501 Page Mill Road
24 *     Palo Alto, California  94304
25 *
26 * Redistributions of source code must retain the above copyright notice,
27 * this list of conditions and the following disclaimer.  Redistributions
28 * in binary form must reproduce the above copyright notice, this list of
29 * conditions and the following disclaimer in the documentation and/or
30 * other materials provided with the distribution.  Neither the name of
31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
32 * contributors may be used to endorse or promote products derived from
33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
36 * Non-Commercial Uses.  Derivatives of the software may be shared with
37 * others provided: (i) the others agree to abide by the list of
38 * conditions herein which includes the Non-Commercial Use restrictions;
39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_ISATRAITS_HH__
59#define __ARCH_X86_ISATRAITS_HH__
60
61#include "arch/x86/intregs.hh"
62#include "arch/x86/types.hh"
63#include "arch/x86/x86_traits.hh"
64#include "sim/host.hh"
65
66class StaticInstPtr;
67
68namespace LittleEndianGuest {}
69
70namespace X86ISA
71{
72    //This makes sure the little endian version of certain functions
73    //are used.
74    using namespace LittleEndianGuest;
75
76    // X86 does not have a delay slot
77#define ISA_HAS_DELAY_SLOT 0
78
79    // X86 NOP (XCHG rAX, rAX)
80    //XXX This needs to be set to an intermediate instruction struct
81    //which encodes this instruction
82
83    // These enumerate all the registers for dependence tracking.
84    enum DependenceTags {
85        //There are 16 microcode registers at the moment. This is an
86        //unusually large constant to make sure there isn't overflow.
87        FP_Base_DepTag = 128,
88        Ctrl_Base_DepTag =
89            FP_Base_DepTag +
90            //mmx/x87 registers
91            8 +
92            //xmm registers
93            16 * 2 +
94            //The microcode fp registers
95            8 +
96            //The indices that are mapped over the fp stack
97            8
98    };
99
100    // semantically meaningful register indices
101    //There is no such register in X86
102    const int ZeroReg = NUM_INTREGS;
103    const int StackPointerReg = INTREG_RSP;
104    //X86 doesn't seem to have a link register
105    const int ReturnAddressReg = 0;
106    const int ReturnValueReg = INTREG_RAX;
107    const int FramePointerReg = INTREG_RBP;
108    const int ArgumentReg[] = {
109        INTREG_RDI,
110        INTREG_RSI,
111        INTREG_RDX,
112        //This argument register is r10 for syscalls and rcx for C.
113        INTREG_R10W,
114        //INTREG_RCX,
115        INTREG_R8W,
116        INTREG_R9W
117    };
118    const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119
120    // Some OS syscalls use a second register (rdx) to return a second
121    // value
122    const int SyscallPseudoReturnReg = INTREG_RDX;
123
124    //XXX These numbers are bogus
125    const int MaxInstSrcRegs = 10;
126    const int MaxInstDestRegs = 10;
127
128    //4k. This value is not constant on x86.
129    const int LogVMPageSize = 12;
130    const int VMPageSize = (1 << LogVMPageSize);
131
132    const int PageShift = 12;
133    const int PageBytes = 1ULL << PageShift;
134
135    const int BranchPredAddrShiftAmt = 0;
136
137    StaticInstPtr decodeInst(ExtMachInst);
138
139    const Addr LoadAddrMask = ULL(0xffffffffff);
140};
141
142#endif // __ARCH_X86_ISATRAITS_HH__
143