isa_traits.hh revision 10924:d02e9c239892
11689SN/A/*
29444SAndreas.Sandberg@ARM.com * Copyright (c) 2007 The Hewlett-Packard Development Company
37849SAli.Saidi@ARM.com * All rights reserved.
47849SAli.Saidi@ARM.com *
57849SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall
67849SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual
77849SAli.Saidi@ARM.com * property including but not limited to intellectual property relating
87849SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software
97849SAli.Saidi@ARM.com * licensed hereunder.  You may use the software subject to the license
107849SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated
117849SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software,
127849SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form.
137849SAli.Saidi@ARM.com *
142329SN/A * Redistribution and use in source and binary forms, with or without
151689SN/A * modification, are permitted provided that the following conditions are
161689SN/A * met: redistributions of source code must retain the above copyright
171689SN/A * notice, this list of conditions and the following disclaimer;
181689SN/A * redistributions in binary form must reproduce the above copyright
191689SN/A * notice, this list of conditions and the following disclaimer in the
201689SN/A * documentation and/or other materials provided with the distribution;
211689SN/A * neither the name of the copyright holders nor the names of its
221689SN/A * contributors may be used to endorse or promote products derived from
231689SN/A * this software without specific prior written permission.
241689SN/A *
251689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
261689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
271689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
281689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
291689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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311689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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351689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
361689SN/A *
371689SN/A * Authors: Gabe Black
381689SN/A */
392665Ssaidi@eecs.umich.edu
402665Ssaidi@eecs.umich.edu#ifndef __ARCH_X86_ISATRAITS_HH__
412756Sksewell@umich.edu#define __ARCH_X86_ISATRAITS_HH__
421689SN/A
431689SN/A#include "arch/x86/types.hh"
442292SN/A#include "arch/x86/x86_traits.hh"
452292SN/A#include "base/types.hh"
461060SN/A
479020Sgblack@eecs.umich.edunamespace LittleEndianGuest {}
482669Sktlim@umich.edu
491461SN/Anamespace X86ISA
506658Snate@binkert.org{
511060SN/A    //This makes sure the little endian version of certain functions
529480Snilay@cs.wisc.edu    //are used.
538229Snate@binkert.org    using namespace LittleEndianGuest;
547849SAli.Saidi@ARM.com
553348Sbinkertn@umich.edu    // X86 does not have a delay slot
562669Sktlim@umich.edu#define ISA_HAS_DELAY_SLOT 0
571461SN/A
581060SN/A    // X86 NOP (XCHG rAX, rAX)
598737Skoansin.tan@gmail.com    //XXX This needs to be set to an intermediate instruction struct
605529Snate@binkert.org    //which encodes this instruction
611060SN/A
622329SN/A    const Addr PageShift = 12;
632329SN/A    const Addr PageBytes = ULL(1) << PageShift;
642329SN/A
652329SN/A    // Memory accesses can be unaligned
662348SN/A    const bool HasUnalignedMemAcc = true;
672329SN/A
681060SN/A    const bool CurThreadInfoImplemented = false;
691060SN/A    const int CurThreadInfoReg = -1;
702292SN/A
711060SN/A    const ExtMachInst NoopMachInst M5_VAR_USED = {
721060SN/A        0x0,                            // No legacy prefixes.
731060SN/A        0x0,                            // No rex prefix.
741061SN/A        0x0,                            // No two / three byte escape sequence
751060SN/A        { OneByteOpcode, 0x90 },        // One opcode byte, 0x90.
761061SN/A        0x0, 0x0,                       // No modrm or sib.
772733Sktlim@umich.edu        0, 0,                           // No immediate or displacement.
781060SN/A        8, 8, 8,                        // All sizes are 8.
792292SN/A        0,                              // Displacement size is 0.
801061SN/A        SixtyFourBitMode                // Behave as if we're in 64 bit
811061SN/A                                        // mode (this doesn't actually matter).
821060SN/A    };
831060SN/A}
842107SN/A
852292SN/A#endif // __ARCH_X86_ISATRAITS_HH__
862632Sstever@eecs.umich.edu