specialize.isa revision 6519
14348Sgblack@eecs.umich.edu// -*- mode:c++ -*- 24348Sgblack@eecs.umich.edu 34348Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company 44348Sgblack@eecs.umich.edu// All rights reserved. 54348Sgblack@eecs.umich.edu// 64348Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 74348Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 84348Sgblack@eecs.umich.edu// following conditions are met: 94348Sgblack@eecs.umich.edu// 104348Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 114348Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 124348Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 134348Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 144348Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 154348Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 164348Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 174348Sgblack@eecs.umich.edu// commercial advantage. 184348Sgblack@eecs.umich.edu// 194348Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 204348Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 214348Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 224348Sgblack@eecs.umich.edu// Office of Strategy and Technology 234348Sgblack@eecs.umich.edu// Hewlett-Packard Company 244348Sgblack@eecs.umich.edu// 1501 Page Mill Road 254348Sgblack@eecs.umich.edu// Palo Alto, California 94304 264348Sgblack@eecs.umich.edu// 274348Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 284348Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. Redistributions 294348Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of 304348Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or 314348Sgblack@eecs.umich.edu// other materials provided with the distribution. Neither the name of 324348Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 334348Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 344348Sgblack@eecs.umich.edu// this software without specific prior written permission. No right of 354348Sgblack@eecs.umich.edu// sublicense is granted herewith. Derivatives of the software and 364348Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for 374348Sgblack@eecs.umich.edu// Non-Commercial Uses. Derivatives of the software may be shared with 384348Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 394348Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 404348Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 414348Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 424348Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 434348Sgblack@eecs.umich.edu// 444348Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 454348Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 464348Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 474348Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 484348Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 494348Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 504348Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 514348Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 524348Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 534348Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 544348Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 554348Sgblack@eecs.umich.edu// 564348Sgblack@eecs.umich.edu// Authors: Gabe Black 574348Sgblack@eecs.umich.edu 584348Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////// 594348Sgblack@eecs.umich.edu// 604348Sgblack@eecs.umich.edu// Code to "specialize" a microcode sequence to use a particular 614348Sgblack@eecs.umich.edu// variety of operands 624348Sgblack@eecs.umich.edu// 634348Sgblack@eecs.umich.edu 644348Sgblack@eecs.umich.edulet {{ 654348Sgblack@eecs.umich.edu # This code builds up a decode block which decodes based on switchval. 664348Sgblack@eecs.umich.edu # vals is a dict which matches case values with what should be decoded to. 674609Sgblack@eecs.umich.edu # Each element of the dict is a list containing a function and then the 684609Sgblack@eecs.umich.edu # arguments to pass to it. 694609Sgblack@eecs.umich.edu def doSplitDecode(switchVal, vals, default = None): 704542Sgblack@eecs.umich.edu blocks = OutputBlocks() 714542Sgblack@eecs.umich.edu blocks.decode_block = 'switch(%s) {\n' % switchVal 724348Sgblack@eecs.umich.edu for (val, todo) in vals.items(): 734609Sgblack@eecs.umich.edu new_blocks = todo[0](*todo[1:]) 744542Sgblack@eecs.umich.edu new_blocks.decode_block = \ 754542Sgblack@eecs.umich.edu '\tcase %s: %s\n' % (val, new_blocks.decode_block) 764542Sgblack@eecs.umich.edu blocks.append(new_blocks) 774348Sgblack@eecs.umich.edu if default: 784609Sgblack@eecs.umich.edu new_blocks = default[0](*default[1:]) 794542Sgblack@eecs.umich.edu new_blocks.decode_block = \ 804542Sgblack@eecs.umich.edu '\tdefault: %s\n' % new_blocks.decode_block 814542Sgblack@eecs.umich.edu blocks.append(new_blocks) 824542Sgblack@eecs.umich.edu blocks.decode_block += '}\n' 834542Sgblack@eecs.umich.edu return blocks 844348Sgblack@eecs.umich.edu}}; 854348Sgblack@eecs.umich.edu 864348Sgblack@eecs.umich.edulet {{ 874609Sgblack@eecs.umich.edu def doRipRelativeDecode(Name, opTypes, env): 884609Sgblack@eecs.umich.edu # print "RIPing %s with opTypes %s" % (Name, opTypes) 895788Sgblack@eecs.umich.edu env.memoryInst = True 905788Sgblack@eecs.umich.edu normEnv = copy.copy(env) 915788Sgblack@eecs.umich.edu normEnv.addToDisassembly( 925788Sgblack@eecs.umich.edu '''printMem(out, env.seg, env.scale, env.index, env.base, 935788Sgblack@eecs.umich.edu machInst.displacement, env.addressSize, false);''') 945788Sgblack@eecs.umich.edu normBlocks = specializeInst(Name + "_M", copy.copy(opTypes), normEnv) 955788Sgblack@eecs.umich.edu ripEnv = copy.copy(env) 965788Sgblack@eecs.umich.edu ripEnv.addToDisassembly( 975788Sgblack@eecs.umich.edu '''printMem(out, env.seg, 1, 0, 0, 985788Sgblack@eecs.umich.edu machInst.displacement, env.addressSize, true);''') 995788Sgblack@eecs.umich.edu ripBlocks = specializeInst(Name + "_P", copy.copy(opTypes), ripEnv) 1004609Sgblack@eecs.umich.edu 1014609Sgblack@eecs.umich.edu blocks = OutputBlocks() 1024609Sgblack@eecs.umich.edu blocks.append(normBlocks) 1034609Sgblack@eecs.umich.edu blocks.append(ripBlocks) 1044609Sgblack@eecs.umich.edu 1054609Sgblack@eecs.umich.edu blocks.decode_block = ''' 1064609Sgblack@eecs.umich.edu if(machInst.modRM.mod == 0 && 1074609Sgblack@eecs.umich.edu machInst.modRM.rm == 5 && 1084609Sgblack@eecs.umich.edu machInst.mode.submode == SixtyFourBitMode) 1094609Sgblack@eecs.umich.edu { %s } 1104609Sgblack@eecs.umich.edu else 1114609Sgblack@eecs.umich.edu { %s }''' % \ 1124609Sgblack@eecs.umich.edu (ripBlocks.decode_block, normBlocks.decode_block) 1134609Sgblack@eecs.umich.edu return blocks 1144609Sgblack@eecs.umich.edu}}; 1154609Sgblack@eecs.umich.edu 1164609Sgblack@eecs.umich.edulet {{ 1174348Sgblack@eecs.umich.edu class OpType(object): 1184601Sgblack@eecs.umich.edu parser = re.compile(r"(?P<tag>[A-Z]+)(?P<size>[a-z]*)|(r(?P<reg>[A-Z0-9]+)(?P<rsize>[a-z]*))") 1194348Sgblack@eecs.umich.edu def __init__(self, opTypeString): 1204348Sgblack@eecs.umich.edu match = OpType.parser.search(opTypeString) 1214348Sgblack@eecs.umich.edu if match == None: 1224348Sgblack@eecs.umich.edu raise Exception, "Problem parsing operand type %s" % opTypeString 1234348Sgblack@eecs.umich.edu self.reg = match.group("reg") 1244348Sgblack@eecs.umich.edu self.tag = match.group("tag") 1254348Sgblack@eecs.umich.edu self.size = match.group("size") 1264746Sgblack@eecs.umich.edu if not self.size: 1274746Sgblack@eecs.umich.edu self.size = match.group("rsize") 1284348Sgblack@eecs.umich.edu 1294548Sgblack@eecs.umich.edu ModRMRegIndex = "(MODRM_REG | (REX_R << 3))" 1304548Sgblack@eecs.umich.edu ModRMRMIndex = "(MODRM_RM | (REX_B << 3))" 1314716Sgblack@eecs.umich.edu InstRegIndex = "(OPCODE_OP_BOTTOM3 | (REX_B << 3))" 1324548Sgblack@eecs.umich.edu 1334348Sgblack@eecs.umich.edu # This function specializes the given piece of code to use a particular 1344528Sgblack@eecs.umich.edu # set of argument types described by "opTypes". 1354528Sgblack@eecs.umich.edu def specializeInst(Name, opTypes, env): 1364568Sgblack@eecs.umich.edu # print "Specializing %s with opTypes %s" % (Name, opTypes) 1374348Sgblack@eecs.umich.edu while len(opTypes): 1384528Sgblack@eecs.umich.edu # Parse the operand type string we're working with 1394542Sgblack@eecs.umich.edu opType = OpType(opTypes[0]) 1404601Sgblack@eecs.umich.edu opTypes.pop(0) 1414348Sgblack@eecs.umich.edu 1426519Sgblack@eecs.umich.edu if opType.tag not in ("I", "J", "P", "PR", "Q", "V", "VR", "W"): 1434746Sgblack@eecs.umich.edu if opType.size: 1444746Sgblack@eecs.umich.edu env.setSize(opType.size) 1454746Sgblack@eecs.umich.edu 1464348Sgblack@eecs.umich.edu if opType.reg: 1474348Sgblack@eecs.umich.edu #Figure out what to do with fixed register operands 1484528Sgblack@eecs.umich.edu #This is the index to use, so we should stick it some place. 1494542Sgblack@eecs.umich.edu if opType.reg in ("A", "B", "C", "D"): 1505788Sgblack@eecs.umich.edu regString = "INTREG_R%sX" % opType.reg 1514542Sgblack@eecs.umich.edu else: 1525788Sgblack@eecs.umich.edu regString = "INTREG_R%s" % opType.reg 1535788Sgblack@eecs.umich.edu env.addReg(regString) 1545788Sgblack@eecs.umich.edu env.addToDisassembly( 1555788Sgblack@eecs.umich.edu "printReg(out, %s, regSize);\n" % regString) 1564575Sgblack@eecs.umich.edu Name += "_R" 1574716Sgblack@eecs.umich.edu elif opType.tag == "B": 1584716Sgblack@eecs.umich.edu # This refers to registers whose index is encoded as part of the opcode 1595788Sgblack@eecs.umich.edu env.addToDisassembly( 1605788Sgblack@eecs.umich.edu "printReg(out, %s, regSize);\n" % InstRegIndex) 1614716Sgblack@eecs.umich.edu Name += "_R" 1624716Sgblack@eecs.umich.edu env.addReg(InstRegIndex) 1634601Sgblack@eecs.umich.edu elif opType.tag == "M": 1644601Sgblack@eecs.umich.edu # This refers to memory. The macroop constructor sets up modrm 1654601Sgblack@eecs.umich.edu # addressing. Non memory modrm settings should cause an error. 1664601Sgblack@eecs.umich.edu env.doModRM = True 1674817Sgblack@eecs.umich.edu return doRipRelativeDecode(Name, opTypes, env) 1684348Sgblack@eecs.umich.edu elif opType.tag == None or opType.size == None: 1694348Sgblack@eecs.umich.edu raise Exception, "Problem parsing operand tag: %s" % opType.tag 1705241Sgblack@eecs.umich.edu elif opType.tag == "C": 1715294Sgblack@eecs.umich.edu # A control register indexed by the "reg" field 1725241Sgblack@eecs.umich.edu env.addReg(ModRMRegIndex) 1735788Sgblack@eecs.umich.edu env.addToDisassembly( 1745788Sgblack@eecs.umich.edu "ccprintf(out, \"CR%%d\", %s);\n" % ModRMRegIndex) 1755241Sgblack@eecs.umich.edu Name += "_C" 1765241Sgblack@eecs.umich.edu elif opType.tag == "D": 1775294Sgblack@eecs.umich.edu # A debug register indexed by the "reg" field 1785241Sgblack@eecs.umich.edu env.addReg(ModRMRegIndex) 1795788Sgblack@eecs.umich.edu env.addToDisassembly( 1805788Sgblack@eecs.umich.edu "ccprintf(out, \"DR%%d\", %s);\n" % ModRMRegIndex) 1815241Sgblack@eecs.umich.edu Name += "_D" 1825294Sgblack@eecs.umich.edu elif opType.tag == "S": 1835294Sgblack@eecs.umich.edu # A segment selector register indexed by the "reg" field 1845294Sgblack@eecs.umich.edu env.addReg(ModRMRegIndex) 1855788Sgblack@eecs.umich.edu env.addToDisassembly( 1865788Sgblack@eecs.umich.edu "printSegment(out, %s);\n" % ModRMRegIndex) 1875294Sgblack@eecs.umich.edu Name += "_S" 1885294Sgblack@eecs.umich.edu elif opType.tag in ("G", "P", "T", "V"): 1894348Sgblack@eecs.umich.edu # Use the "reg" field of the ModRM byte to select the register 1904548Sgblack@eecs.umich.edu env.addReg(ModRMRegIndex) 1915788Sgblack@eecs.umich.edu env.addToDisassembly( 1925788Sgblack@eecs.umich.edu "printReg(out, %s, regSize);\n" % ModRMRegIndex) 1936518Sgblack@eecs.umich.edu if opType.tag == "P": 1946518Sgblack@eecs.umich.edu Name += "_MMX" 1956518Sgblack@eecs.umich.edu elif opType.tag == "V": 1966518Sgblack@eecs.umich.edu Name += "_XMM" 1976518Sgblack@eecs.umich.edu else: 1986518Sgblack@eecs.umich.edu Name += "_R" 1994348Sgblack@eecs.umich.edu elif opType.tag in ("E", "Q", "W"): 2004348Sgblack@eecs.umich.edu # This might refer to memory or to a register. We need to 2014348Sgblack@eecs.umich.edu # divide it up farther. 2024528Sgblack@eecs.umich.edu regEnv = copy.copy(env) 2034548Sgblack@eecs.umich.edu regEnv.addReg(ModRMRMIndex) 2045788Sgblack@eecs.umich.edu regEnv.addToDisassembly( 2055788Sgblack@eecs.umich.edu "printReg(out, %s, regSize);\n" % ModRMRMIndex) 2064601Sgblack@eecs.umich.edu # This refers to memory. The macroop constructor should set up 2074601Sgblack@eecs.umich.edu # modrm addressing. 2084528Sgblack@eecs.umich.edu memEnv = copy.copy(env) 2094601Sgblack@eecs.umich.edu memEnv.doModRM = True 2106518Sgblack@eecs.umich.edu regSuffix = "_R" 2116518Sgblack@eecs.umich.edu if opType.tag == "Q": 2126518Sgblack@eecs.umich.edu regSuffix = "_MMX" 2136518Sgblack@eecs.umich.edu elif opType.tag == "W": 2146518Sgblack@eecs.umich.edu regSuffix = "_XMM" 2154609Sgblack@eecs.umich.edu return doSplitDecode("MODRM_MOD", 2166518Sgblack@eecs.umich.edu {"3" : (specializeInst, Name + regSuffix, 2176518Sgblack@eecs.umich.edu copy.copy(opTypes), regEnv)}, 2186518Sgblack@eecs.umich.edu (doRipRelativeDecode, Name, 2196518Sgblack@eecs.umich.edu copy.copy(opTypes), memEnv)) 2204348Sgblack@eecs.umich.edu elif opType.tag in ("I", "J"): 2214532Sgblack@eecs.umich.edu # Immediates 2225788Sgblack@eecs.umich.edu env.addToDisassembly( 2235788Sgblack@eecs.umich.edu "ccprintf(out, \"%#x\", machInst.immediate);\n") 2244575Sgblack@eecs.umich.edu Name += "_I" 2255151Sgblack@eecs.umich.edu elif opType.tag == "O": 2265151Sgblack@eecs.umich.edu # Immediate containing a memory offset 2275151Sgblack@eecs.umich.edu Name += "_MI" 2284348Sgblack@eecs.umich.edu elif opType.tag in ("PR", "R", "VR"): 2294601Sgblack@eecs.umich.edu # Non register modrm settings should cause an error 2304548Sgblack@eecs.umich.edu env.addReg(ModRMRMIndex) 2315788Sgblack@eecs.umich.edu env.addToDisassembly( 2325788Sgblack@eecs.umich.edu "printReg(out, %s, regSize);\n" % ModRMRMIndex) 2336518Sgblack@eecs.umich.edu if opType.tag == "PR": 2346518Sgblack@eecs.umich.edu Name += "_MMX" 2356518Sgblack@eecs.umich.edu elif opType.tag == "VR": 2366518Sgblack@eecs.umich.edu Name += "_XMM" 2376518Sgblack@eecs.umich.edu else: 2386518Sgblack@eecs.umich.edu Name += "_R" 2394868Sgblack@eecs.umich.edu elif opType.tag in ("X", "Y"): 2404868Sgblack@eecs.umich.edu # This type of memory addressing is for string instructions. 2414868Sgblack@eecs.umich.edu # They'll use the right index and segment internally. 2425788Sgblack@eecs.umich.edu if opType.tag == "X": 2435788Sgblack@eecs.umich.edu env.addToDisassembly( 2445788Sgblack@eecs.umich.edu '''printMem(out, env.seg, 2455788Sgblack@eecs.umich.edu 1, X86ISA::ZeroReg, X86ISA::INTREG_RSI, 0, 2465788Sgblack@eecs.umich.edu env.addressSize, false);''') 2475788Sgblack@eecs.umich.edu else: 2485788Sgblack@eecs.umich.edu env.addToDisassembly( 2495788Sgblack@eecs.umich.edu '''printMem(out, SEGMENT_REG_ES, 2505788Sgblack@eecs.umich.edu 1, X86ISA::ZeroReg, X86ISA::INTREG_RDI, 0, 2515788Sgblack@eecs.umich.edu env.addressSize, false);''') 2524868Sgblack@eecs.umich.edu Name += "_M" 2534348Sgblack@eecs.umich.edu else: 2544348Sgblack@eecs.umich.edu raise Exception, "Unrecognized tag %s." % opType.tag 2554348Sgblack@eecs.umich.edu 2564532Sgblack@eecs.umich.edu # Generate code to return a macroop of the given name which will 2574559Sgblack@eecs.umich.edu # operate in the "emulation environment" env 2584528Sgblack@eecs.umich.edu return genMacroop(Name, env) 2594348Sgblack@eecs.umich.edu}}; 260