xref: /gem5/src/arch/x86/isa/microops/limmop.isa

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// Authors: Gabe Black

//////////////////////////////////////////////////////////////////////////
//
// LIMMOp Microop templates
//
//////////////////////////////////////////////////////////////////////////

def template MicroLimmOpExecute {{
        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
                Trace::InstRecord *traceData) const
        {
            %(op_decl)s;
            %(op_rd)s;
            %(code)s;
            %(op_wb)s;
            return NoFault;
        }
}};

def template MicroLimmOpDeclare {{
    class %(class_name)s : public X86ISA::X86MicroopBase
    {
      protected:
        const RegIndex dest;
        const uint64_t imm;
        const uint8_t dataSize;
        RegIndex foldOBit;
        void buildMe();

        std::string generateDisassembly(Addr pc,
            const SymbolTable *symtab) const;

      public:
        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                bool isMicro, bool isDelayed, bool isFirst, bool isLast,
                RegIndex _dest, uint64_t _imm, uint8_t _dataSize);

        %(class_name)s(ExtMachInst _machInst,
                const char * instMnem,
                RegIndex _dest, uint64_t _imm, uint8_t _dataSize);

        %(BasicExecDeclare)s
    };
}};

def template MicroLimmOpDisassembly {{
    std::string %(class_name)s::generateDisassembly(Addr pc,
            const SymbolTable *symtab) const
    {
        std::stringstream response;

        printMnemonic(response, instMnem, mnemonic);
        printDestReg(response, 0, dataSize);
        response << ", ";
        ccprintf(response, "%#x", imm);
        return response.str();
    }
}};

def template MicroLimmOpConstructor {{

    inline void %(class_name)s::buildMe()
    {
        foldOBit = (dataSize == 1 && !machInst.rex.present) ? 1 << 6 : 0;
        %(constructor)s;
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            RegIndex _dest, uint64_t _imm, uint8_t _dataSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                false, false, false, false, %(op_class)s),
                dest(_dest), imm(_imm), dataSize(_dataSize)
    {
        buildMe();
    }

    inline %(class_name)s::%(class_name)s(
            ExtMachInst machInst, const char * instMnem,
            bool isMicro, bool isDelayed, bool isFirst, bool isLast,
            RegIndex _dest, uint64_t _imm, uint8_t _dataSize) :
        %(base_class)s(machInst, "%(mnemonic)s", instMnem,
                isMicro, isDelayed, isFirst, isLast, %(op_class)s),
                dest(_dest), imm(_imm), dataSize(_dataSize)
    {
        buildMe();
    }
}};

let {{
    class LimmOp(X86Microop):
        def __init__(self, dest, imm, dataSize="env.dataSize"):
            self.className = "Limm"
            self.mnemonic = "limm"
            self.dest = dest
            self.imm = imm
            self.dataSize = dataSize

        def getAllocator(self, *microFlags):
            allocator = '''new %(class_name)s(machInst, mnemonic
                    %(flags)s, %(dest)s, %(imm)s, %(dataSize)s)''' % {
                "class_name" : self.className,
                "mnemonic" : self.mnemonic,
                "flags" : self.microFlagsText(microFlags),
                "dest" : self.dest, "imm" : self.imm,
                "dataSize" : self.dataSize}
            return allocator

    microopClasses["limm"] = LimmOp
}};

let {{
    # Build up the all register version of this micro op
    iop = InstObjParams("limm", "Limm", 'X86MicroopBase',
            {"code" : "DestReg = merge(DestReg, imm, dataSize);"})
    header_output += MicroLimmOpDeclare.subst(iop)
    decoder_output += MicroLimmOpConstructor.subst(iop)
    decoder_output += MicroLimmOpDisassembly.subst(iop)
    exec_output += MicroLimmOpExecute.subst(iop)
}};