fpop.isa revision 7620
1// Copyright (c) 2007 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license 9// terms below provided that you ensure that this notice is replicated 10// unmodified and in its entirety in all distributions of the software, 11// modified or unmodified, in source code or in binary form. 12// 13// Redistribution and use in source and binary forms, with or without 14// modification, are permitted provided that the following conditions are 15// met: redistributions of source code must retain the above copyright 16// notice, this list of conditions and the following disclaimer; 17// redistributions in binary form must reproduce the above copyright 18// notice, this list of conditions and the following disclaimer in the 19// documentation and/or other materials provided with the distribution; 20// neither the name of the copyright holders nor the names of its 21// contributors may be used to endorse or promote products derived from 22// this software without specific prior written permission. 23// 24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35// 36// Authors: Gabe Black 37 38////////////////////////////////////////////////////////////////////////// 39// 40// FpOp Microop templates 41// 42////////////////////////////////////////////////////////////////////////// 43 44def template MicroFpOpExecute {{ 45 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 46 Trace::InstRecord *traceData) const 47 { 48 Fault fault = NoFault; 49 50 DPRINTF(X86, "The data size is %d\n", dataSize); 51 %(op_decl)s; 52 %(op_rd)s; 53 54 if(%(cond_check)s) 55 { 56 %(code)s; 57 %(flag_code)s; 58 %(top_code)s; 59 } 60 else 61 { 62 %(else_code)s; 63 } 64 65 //Write the resulting state to the execution context 66 if(fault == NoFault) 67 { 68 %(op_wb)s; 69 } 70 return fault; 71 } 72}}; 73 74def template MicroFpOpDeclare {{ 75 class %(class_name)s : public %(base_class)s 76 { 77 protected: 78 void buildMe(); 79 80 public: 81 %(class_name)s(ExtMachInst _machInst, 82 const char * instMnem, uint64_t setFlags, 83 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 84 uint8_t _dataSize, int8_t _spm); 85 86 %(class_name)s(ExtMachInst _machInst, 87 const char * instMnem, 88 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 89 uint8_t _dataSize, int8_t _spm); 90 91 %(BasicExecDeclare)s 92 }; 93}}; 94 95def template MicroFpOpConstructor {{ 96 97 inline void %(class_name)s::buildMe() 98 { 99 %(constructor)s; 100 } 101 102 inline %(class_name)s::%(class_name)s( 103 ExtMachInst machInst, const char * instMnem, 104 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 105 uint8_t _dataSize, int8_t _spm) : 106 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 0, 107 _src1, _src2, _dest, _dataSize, _spm, 108 %(op_class)s) 109 { 110 buildMe(); 111 } 112 113 inline %(class_name)s::%(class_name)s( 114 ExtMachInst machInst, const char * instMnem, uint64_t setFlags, 115 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 116 uint8_t _dataSize, int8_t _spm) : 117 %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, 118 _src1, _src2, _dest, _dataSize, _spm, 119 %(op_class)s) 120 { 121 buildMe(); 122 } 123}}; 124 125let {{ 126 # Make these empty strings so that concatenating onto 127 # them will always work. 128 header_output = "" 129 decoder_output = "" 130 exec_output = "" 131 132 class FpOpMeta(type): 133 def buildCppClasses(self, name, Name, suffix, \ 134 code, flag_code, cond_check, else_code): 135 136 # Globals to stick the output in 137 global header_output 138 global decoder_output 139 global exec_output 140 141 # Stick all the code together so it can be searched at once 142 allCode = "|".join((code, flag_code, cond_check, else_code)) 143 144 # If there's something optional to do with flags, generate 145 # a version without it and fix up this version to use it. 146 if flag_code is not "" or cond_check is not "true": 147 self.buildCppClasses(name, Name, suffix, 148 code, "", "true", else_code) 149 suffix = "Flags" + suffix 150 151 base = "X86ISA::FpOp" 152 153 # Get everything ready for the substitution 154 iop_top = InstObjParams(name, Name + suffix + "Top", base, 155 {"code" : code, 156 "flag_code" : flag_code, 157 "cond_check" : cond_check, 158 "else_code" : else_code, 159 "top_code" : "TOP = (TOP + spm + 8) % 8;"}) 160 iop = InstObjParams(name, Name + suffix, base, 161 {"code" : code, 162 "flag_code" : flag_code, 163 "cond_check" : cond_check, 164 "else_code" : else_code, 165 "top_code" : ";"}) 166 167 # Generate the actual code (finally!) 168 header_output += MicroFpOpDeclare.subst(iop_top) 169 decoder_output += MicroFpOpConstructor.subst(iop_top) 170 exec_output += MicroFpOpExecute.subst(iop_top) 171 header_output += MicroFpOpDeclare.subst(iop) 172 decoder_output += MicroFpOpConstructor.subst(iop) 173 exec_output += MicroFpOpExecute.subst(iop) 174 175 176 def __new__(mcls, Name, bases, dict): 177 abstract = False 178 name = Name.lower() 179 if "abstract" in dict: 180 abstract = dict['abstract'] 181 del dict['abstract'] 182 183 cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict) 184 if not abstract: 185 cls.className = Name 186 cls.mnemonic = name 187 code = cls.code 188 flag_code = cls.flag_code 189 cond_check = cls.cond_check 190 else_code = cls.else_code 191 192 # Set up the C++ classes 193 mcls.buildCppClasses(cls, name, Name, "", 194 code, flag_code, cond_check, else_code) 195 196 # Hook into the microassembler dict 197 global microopClasses 198 microopClasses[name] = cls 199 200 return cls 201 202 203 class FpOp(X86Microop): 204 __metaclass__ = FpOpMeta 205 # This class itself doesn't act as a microop 206 abstract = True 207 208 # Default template parameter values 209 flag_code = "" 210 cond_check = "true" 211 else_code = ";" 212 213 def __init__(self, dest, src1, src2, spm=0, \ 214 SetStatus=False, dataSize="env.dataSize"): 215 self.dest = dest 216 self.src1 = src1 217 self.src2 = src2 218 self.spm = spm 219 self.dataSize = dataSize 220 if SetStatus: 221 self.className += "Flags" 222 if spm: 223 self.className += "Top" 224 225 def getAllocator(self, microFlags): 226 return '''new %(class_name)s(machInst, macrocodeBlock, 227 %(flags)s, %(src1)s, %(src2)s, %(dest)s, 228 %(dataSize)s, %(spm)d)''' % { 229 "class_name" : self.className, 230 "flags" : self.microFlagsText(microFlags), 231 "src1" : self.src1, "src2" : self.src2, 232 "dest" : self.dest, 233 "dataSize" : self.dataSize, 234 "spm" : self.spm} 235 236 class Movfp(FpOp): 237 def __init__(self, dest, src1, spm=0, \ 238 SetStatus=False, dataSize="env.dataSize"): 239 super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \ 240 spm, SetStatus, dataSize) 241 code = 'FpDestReg.uqw = FpSrcReg1.uqw;' 242 else_code = 'FpDestReg.uqw = FpDestReg.uqw;' 243 cond_check = "checkCondition(ccFlagBits, src2)" 244 245 class Xorfp(FpOp): 246 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;' 247 248 class Sqrtfp(FpOp): 249 code = 'FpDestReg = sqrt(FpSrcReg2);' 250 251 # Conversion microops 252 class ConvOp(FpOp): 253 abstract = True 254 def __init__(self, dest, src1): 255 super(ConvOp, self).__init__(dest, src1, \ 256 "InstRegIndex(FLOATREG_MICROFP0)") 257 258 # These probably shouldn't look at the ExtMachInst directly to figure 259 # out what size to use and should instead delegate that to the macroop's 260 # constructor. That would be more efficient, and it would make the 261 # microops a little more modular. 262 class cvtf_i2d(ConvOp): 263 code = ''' 264 X86IntReg intReg = SSrcReg1; 265 if (REX_W) 266 FpDestReg = intReg.SR; 267 else 268 FpDestReg = intReg.SE; 269 ''' 270 271 class cvtf_i2d_hi(ConvOp): 272 code = 'FpDestReg = bits(SSrcReg1, 63, 32);' 273 274 class cvtf_d2i(ConvOp): 275 code = ''' 276 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1); 277 if (REX_W) 278 SDestReg = intSrcReg1; 279 else 280 SDestReg = merge(SDestReg, intSrcReg1, 4); 281 ''' 282 283 # These need to consider size at some point. They'll always use doubles 284 # for the moment. 285 class addfp(FpOp): 286 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;' 287 288 class mulfp(FpOp): 289 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;' 290 291 class divfp(FpOp): 292 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;' 293 294 class subfp(FpOp): 295 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;' 296 297 class Compfp(FpOp): 298 def __init__(self, src1, src2, spm=0, setStatus=False, \ 299 dataSize="env.dataSize"): 300 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \ 301 src1, src2, spm, setStatus, dataSize) 302 # This class sets the condition codes in rflags according to the 303 # rules for comparing floating point. 304 code = ''' 305 // ZF PF CF 306 // Unordered 1 1 1 307 // Greater than 0 0 0 308 // Less than 0 0 1 309 // Equal 1 0 0 310 // OF = SF = AF = 0 311 ccFlagBits = ccFlagBits & ~(OFBit | SFBit | AFBit | 312 ZFBit | PFBit | CFBit); 313 if (isnan(FpSrcReg1) || isnan(FpSrcReg2)) 314 ccFlagBits = ccFlagBits | (ZFBit | PFBit | CFBit); 315 else if(FpSrcReg1 < FpSrcReg2) 316 ccFlagBits = ccFlagBits | CFBit; 317 else if(FpSrcReg1 == FpSrcReg2) 318 ccFlagBits = ccFlagBits | ZFBit; 319 ''' 320}}; 321