fpop.isa revision 7087
1// Copyright (c) 2007 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license 9// terms below provided that you ensure that this notice is replicated 10// unmodified and in its entirety in all distributions of the software, 11// modified or unmodified, in source code or in binary form. 12// 13// Redistribution and use in source and binary forms, with or without 14// modification, are permitted provided that the following conditions are 15// met: redistributions of source code must retain the above copyright 16// notice, this list of conditions and the following disclaimer; 17// redistributions in binary form must reproduce the above copyright 18// notice, this list of conditions and the following disclaimer in the 19// documentation and/or other materials provided with the distribution; 20// neither the name of the copyright holders nor the names of its 21// contributors may be used to endorse or promote products derived from 22// this software without specific prior written permission. 23// 24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35// 36// Authors: Gabe Black 37 38////////////////////////////////////////////////////////////////////////// 39// 40// FpOp Microop templates 41// 42////////////////////////////////////////////////////////////////////////// 43 44def template MicroFpOpExecute {{ 45 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 46 Trace::InstRecord *traceData) const 47 { 48 Fault fault = NoFault; 49 50 DPRINTF(X86, "The data size is %d\n", dataSize); 51 %(op_decl)s; 52 %(op_rd)s; 53 54 if(%(cond_check)s) 55 { 56 %(code)s; 57 %(flag_code)s; 58 %(top_code)s; 59 } 60 else 61 { 62 %(else_code)s; 63 } 64 65 //Write the resulting state to the execution context 66 if(fault == NoFault) 67 { 68 %(op_wb)s; 69 } 70 return fault; 71 } 72}}; 73 74def template MicroFpOpDeclare {{ 75 class %(class_name)s : public %(base_class)s 76 { 77 protected: 78 void buildMe(); 79 80 public: 81 %(class_name)s(ExtMachInst _machInst, 82 const char * instMnem, 83 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 84 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 85 uint8_t _dataSize, int8_t _spm); 86 87 %(class_name)s(ExtMachInst _machInst, 88 const char * instMnem, 89 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 90 uint8_t _dataSize, int8_t _spm); 91 92 %(BasicExecDeclare)s 93 }; 94}}; 95 96def template MicroFpOpConstructor {{ 97 98 inline void %(class_name)s::buildMe() 99 { 100 %(constructor)s; 101 } 102 103 inline %(class_name)s::%(class_name)s( 104 ExtMachInst machInst, const char * instMnem, 105 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 106 uint8_t _dataSize, int8_t _spm) : 107 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 108 false, false, false, false, 109 _src1, _src2, _dest, _dataSize, _spm, 110 %(op_class)s) 111 { 112 buildMe(); 113 } 114 115 inline %(class_name)s::%(class_name)s( 116 ExtMachInst machInst, const char * instMnem, 117 bool isMicro, bool isDelayed, bool isFirst, bool isLast, 118 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 119 uint8_t _dataSize, int8_t _spm) : 120 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 121 isMicro, isDelayed, isFirst, isLast, 122 _src1, _src2, _dest, _dataSize, _spm, 123 %(op_class)s) 124 { 125 buildMe(); 126 } 127}}; 128 129let {{ 130 # Make these empty strings so that concatenating onto 131 # them will always work. 132 header_output = "" 133 decoder_output = "" 134 exec_output = "" 135 136 class FpOpMeta(type): 137 def buildCppClasses(self, name, Name, suffix, \ 138 code, flag_code, cond_check, else_code): 139 140 # Globals to stick the output in 141 global header_output 142 global decoder_output 143 global exec_output 144 145 # Stick all the code together so it can be searched at once 146 allCode = "|".join((code, flag_code, cond_check, else_code)) 147 148 # If there's something optional to do with flags, generate 149 # a version without it and fix up this version to use it. 150 if flag_code is not "" or cond_check is not "true": 151 self.buildCppClasses(name, Name, suffix, 152 code, "", "true", else_code) 153 suffix = "Flags" + suffix 154 155 base = "X86ISA::FpOp" 156 157 # Get everything ready for the substitution 158 iop_top = InstObjParams(name, Name + suffix + "Top", base, 159 {"code" : code, 160 "flag_code" : flag_code, 161 "cond_check" : cond_check, 162 "else_code" : else_code, 163 "top_code" : "TOP = (TOP + spm + 8) % 8;"}) 164 iop = InstObjParams(name, Name + suffix, base, 165 {"code" : code, 166 "flag_code" : flag_code, 167 "cond_check" : cond_check, 168 "else_code" : else_code, 169 "top_code" : ";"}) 170 171 # Generate the actual code (finally!) 172 header_output += MicroFpOpDeclare.subst(iop_top) 173 decoder_output += MicroFpOpConstructor.subst(iop_top) 174 exec_output += MicroFpOpExecute.subst(iop_top) 175 header_output += MicroFpOpDeclare.subst(iop) 176 decoder_output += MicroFpOpConstructor.subst(iop) 177 exec_output += MicroFpOpExecute.subst(iop) 178 179 180 def __new__(mcls, Name, bases, dict): 181 abstract = False 182 name = Name.lower() 183 if "abstract" in dict: 184 abstract = dict['abstract'] 185 del dict['abstract'] 186 187 cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict) 188 if not abstract: 189 cls.className = Name 190 cls.mnemonic = name 191 code = cls.code 192 flag_code = cls.flag_code 193 cond_check = cls.cond_check 194 else_code = cls.else_code 195 196 # Set up the C++ classes 197 mcls.buildCppClasses(cls, name, Name, "", 198 code, flag_code, cond_check, else_code) 199 200 # Hook into the microassembler dict 201 global microopClasses 202 microopClasses[name] = cls 203 204 return cls 205 206 207 class FpOp(X86Microop): 208 __metaclass__ = FpOpMeta 209 # This class itself doesn't act as a microop 210 abstract = True 211 212 # Default template parameter values 213 flag_code = "" 214 cond_check = "true" 215 else_code = ";" 216 217 def __init__(self, dest, src1, src2, spm=0, \ 218 SetStatus=False, dataSize="env.dataSize"): 219 self.dest = dest 220 self.src1 = src1 221 self.src2 = src2 222 self.spm = spm 223 self.dataSize = dataSize 224 if SetStatus: 225 self.className += "Flags" 226 if spm: 227 self.className += "Top" 228 229 def getAllocator(self, *microFlags): 230 return '''new %(class_name)s(machInst, macrocodeBlock 231 %(flags)s, %(src1)s, %(src2)s, %(dest)s, 232 %(dataSize)s, %(spm)d)''' % { 233 "class_name" : self.className, 234 "flags" : self.microFlagsText(microFlags), 235 "src1" : self.src1, "src2" : self.src2, 236 "dest" : self.dest, 237 "dataSize" : self.dataSize, 238 "spm" : self.spm} 239 240 class Movfp(FpOp): 241 def __init__(self, dest, src1, spm=0, \ 242 SetStatus=False, dataSize="env.dataSize"): 243 super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \ 244 spm, SetStatus, dataSize) 245 code = 'FpDestReg.uqw = FpSrcReg1.uqw;' 246 else_code = 'FpDestReg.uqw = FpDestReg.uqw;' 247 cond_check = "checkCondition(ccFlagBits, src2)" 248 249 class Xorfp(FpOp): 250 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;' 251 252 class Sqrtfp(FpOp): 253 code = 'FpDestReg = sqrt(FpSrcReg2);' 254 255 # Conversion microops 256 class ConvOp(FpOp): 257 abstract = True 258 def __init__(self, dest, src1): 259 super(ConvOp, self).__init__(dest, src1, \ 260 "InstRegIndex(FLOATREG_MICROFP0)") 261 262 # These probably shouldn't look at the ExtMachInst directly to figure 263 # out what size to use and should instead delegate that to the macroop's 264 # constructor. That would be more efficient, and it would make the 265 # microops a little more modular. 266 class cvtf_i2d(ConvOp): 267 code = ''' 268 X86IntReg intReg = SSrcReg1; 269 if (REX_W) 270 FpDestReg = intReg.SR; 271 else 272 FpDestReg = intReg.SE; 273 ''' 274 275 class cvtf_i2d_hi(ConvOp): 276 code = 'FpDestReg = bits(SSrcReg1, 63, 32);' 277 278 class cvtf_d2i(ConvOp): 279 code = ''' 280 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1); 281 if (REX_W) 282 SDestReg = intSrcReg1; 283 else 284 SDestReg = merge(SDestReg, intSrcReg1, 4); 285 ''' 286 287 # These need to consider size at some point. They'll always use doubles 288 # for the moment. 289 class addfp(FpOp): 290 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;' 291 292 class mulfp(FpOp): 293 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;' 294 295 class divfp(FpOp): 296 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;' 297 298 class subfp(FpOp): 299 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;' 300 301 class Compfp(FpOp): 302 def __init__(self, src1, src2, spm=0, setStatus=False, \ 303 dataSize="env.dataSize"): 304 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \ 305 src1, src2, spm, setStatus, dataSize) 306 # This class sets the condition codes in rflags according to the 307 # rules for comparing floating point. 308 code = ''' 309 // ZF PF CF 310 // Unordered 1 1 1 311 // Greater than 0 0 0 312 // Less than 0 0 1 313 // Equal 1 0 0 314 // OF = SF = AF = 0 315 ccFlagBits = ccFlagBits & ~(OFBit | SFBit | AFBit | 316 ZFBit | PFBit | CFBit); 317 if (isnan(FpSrcReg1) || isnan(FpSrcReg2)) 318 ccFlagBits = ccFlagBits | (ZFBit | PFBit | CFBit); 319 else if(FpSrcReg1 < FpSrcReg2) 320 ccFlagBits = ccFlagBits | CFBit; 321 else if(FpSrcReg1 == FpSrcReg2) 322 ccFlagBits = ccFlagBits | ZFBit; 323 ''' 324}}; 325