fpop.isa revision 10184
15083Sgblack@eecs.umich.edu// Copyright (c) 2007 The Hewlett-Packard Development Company 29582Snilay@cs.wisc.edu// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood 35083Sgblack@eecs.umich.edu// All rights reserved. 45083Sgblack@eecs.umich.edu// 57087Snate@binkert.org// The license below extends only to copyright in the software and shall 67087Snate@binkert.org// not be construed as granting a license to any other intellectual 77087Snate@binkert.org// property including but not limited to intellectual property relating 87087Snate@binkert.org// to a hardware implementation of the functionality of the software 97087Snate@binkert.org// licensed hereunder. You may use the software subject to the license 107087Snate@binkert.org// terms below provided that you ensure that this notice is replicated 117087Snate@binkert.org// unmodified and in its entirety in all distributions of the software, 127087Snate@binkert.org// modified or unmodified, in source code or in binary form. 135083Sgblack@eecs.umich.edu// 147087Snate@binkert.org// Redistribution and use in source and binary forms, with or without 157087Snate@binkert.org// modification, are permitted provided that the following conditions are 167087Snate@binkert.org// met: redistributions of source code must retain the above copyright 177087Snate@binkert.org// notice, this list of conditions and the following disclaimer; 187087Snate@binkert.org// redistributions in binary form must reproduce the above copyright 197087Snate@binkert.org// notice, this list of conditions and the following disclaimer in the 207087Snate@binkert.org// documentation and/or other materials provided with the distribution; 217087Snate@binkert.org// neither the name of the copyright holders nor the names of its 225083Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 237087Snate@binkert.org// this software without specific prior written permission. 245083Sgblack@eecs.umich.edu// 255083Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 265083Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 275083Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 285083Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 295083Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 305083Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 315083Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 325083Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 335083Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 345083Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 355083Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 365083Sgblack@eecs.umich.edu// 375083Sgblack@eecs.umich.edu// Authors: Gabe Black 389582Snilay@cs.wisc.edu// Nilay Vaish 395083Sgblack@eecs.umich.edu 405083Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 415083Sgblack@eecs.umich.edu// 425083Sgblack@eecs.umich.edu// FpOp Microop templates 435083Sgblack@eecs.umich.edu// 445083Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////////// 455083Sgblack@eecs.umich.edu 465083Sgblack@eecs.umich.edudef template MicroFpOpExecute {{ 475083Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 485083Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 495083Sgblack@eecs.umich.edu { 505083Sgblack@eecs.umich.edu Fault fault = NoFault; 515083Sgblack@eecs.umich.edu 525083Sgblack@eecs.umich.edu DPRINTF(X86, "The data size is %d\n", dataSize); 535083Sgblack@eecs.umich.edu %(op_decl)s; 545083Sgblack@eecs.umich.edu %(op_rd)s; 555083Sgblack@eecs.umich.edu 565083Sgblack@eecs.umich.edu if(%(cond_check)s) 575083Sgblack@eecs.umich.edu { 585083Sgblack@eecs.umich.edu %(code)s; 595083Sgblack@eecs.umich.edu %(flag_code)s; 609765Sandreas@sandberg.pp.se %(tag_code)s; 615083Sgblack@eecs.umich.edu %(top_code)s; 625083Sgblack@eecs.umich.edu } 635083Sgblack@eecs.umich.edu else 645083Sgblack@eecs.umich.edu { 655083Sgblack@eecs.umich.edu %(else_code)s; 665083Sgblack@eecs.umich.edu } 675083Sgblack@eecs.umich.edu 685083Sgblack@eecs.umich.edu //Write the resulting state to the execution context 695083Sgblack@eecs.umich.edu if(fault == NoFault) 705083Sgblack@eecs.umich.edu { 715083Sgblack@eecs.umich.edu %(op_wb)s; 725083Sgblack@eecs.umich.edu } 735083Sgblack@eecs.umich.edu return fault; 745083Sgblack@eecs.umich.edu } 755083Sgblack@eecs.umich.edu}}; 765083Sgblack@eecs.umich.edu 775083Sgblack@eecs.umich.edudef template MicroFpOpDeclare {{ 785083Sgblack@eecs.umich.edu class %(class_name)s : public %(base_class)s 795083Sgblack@eecs.umich.edu { 805083Sgblack@eecs.umich.edu public: 815083Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst _machInst, 827620Sgblack@eecs.umich.edu const char * instMnem, uint64_t setFlags, 836345Sgblack@eecs.umich.edu InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 845083Sgblack@eecs.umich.edu uint8_t _dataSize, int8_t _spm); 855083Sgblack@eecs.umich.edu 865083Sgblack@eecs.umich.edu %(BasicExecDeclare)s 875083Sgblack@eecs.umich.edu }; 885083Sgblack@eecs.umich.edu}}; 895083Sgblack@eecs.umich.edu 905083Sgblack@eecs.umich.edudef template MicroFpOpConstructor {{ 9110184SCurtis.Dunham@arm.com %(class_name)s::%(class_name)s( 927620Sgblack@eecs.umich.edu ExtMachInst machInst, const char * instMnem, uint64_t setFlags, 936345Sgblack@eecs.umich.edu InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest, 945083Sgblack@eecs.umich.edu uint8_t _dataSize, int8_t _spm) : 957620Sgblack@eecs.umich.edu %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags, 965083Sgblack@eecs.umich.edu _src1, _src2, _dest, _dataSize, _spm, 975083Sgblack@eecs.umich.edu %(op_class)s) 985083Sgblack@eecs.umich.edu { 997626Sgblack@eecs.umich.edu %(constructor)s; 1005083Sgblack@eecs.umich.edu } 1015083Sgblack@eecs.umich.edu}}; 1025083Sgblack@eecs.umich.edu 1035083Sgblack@eecs.umich.edulet {{ 1045083Sgblack@eecs.umich.edu # Make these empty strings so that concatenating onto 1055083Sgblack@eecs.umich.edu # them will always work. 1065083Sgblack@eecs.umich.edu header_output = "" 1075083Sgblack@eecs.umich.edu decoder_output = "" 1085083Sgblack@eecs.umich.edu exec_output = "" 1095083Sgblack@eecs.umich.edu 1105083Sgblack@eecs.umich.edu class FpOpMeta(type): 1115083Sgblack@eecs.umich.edu def buildCppClasses(self, name, Name, suffix, \ 1129699Snilay@cs.wisc.edu code, flag_code, cond_check, else_code, op_class): 1135083Sgblack@eecs.umich.edu 1145083Sgblack@eecs.umich.edu # Globals to stick the output in 1155083Sgblack@eecs.umich.edu global header_output 1165083Sgblack@eecs.umich.edu global decoder_output 1175083Sgblack@eecs.umich.edu global exec_output 1185083Sgblack@eecs.umich.edu 1195083Sgblack@eecs.umich.edu # Stick all the code together so it can be searched at once 1205083Sgblack@eecs.umich.edu allCode = "|".join((code, flag_code, cond_check, else_code)) 1215083Sgblack@eecs.umich.edu 1225083Sgblack@eecs.umich.edu # If there's something optional to do with flags, generate 1235083Sgblack@eecs.umich.edu # a version without it and fix up this version to use it. 1245083Sgblack@eecs.umich.edu if flag_code is not "" or cond_check is not "true": 1255083Sgblack@eecs.umich.edu self.buildCppClasses(name, Name, suffix, 1269699Snilay@cs.wisc.edu code, "", "true", else_code, op_class) 1275083Sgblack@eecs.umich.edu suffix = "Flags" + suffix 1285083Sgblack@eecs.umich.edu 1295083Sgblack@eecs.umich.edu base = "X86ISA::FpOp" 1305083Sgblack@eecs.umich.edu 1315083Sgblack@eecs.umich.edu # Get everything ready for the substitution 1329765Sandreas@sandberg.pp.se iop_tag = InstObjParams(name, Name + suffix + "TopTag", base, 1339765Sandreas@sandberg.pp.se {"code" : code, 1349765Sandreas@sandberg.pp.se "flag_code" : flag_code, 1359765Sandreas@sandberg.pp.se "cond_check" : cond_check, 1369765Sandreas@sandberg.pp.se "else_code" : else_code, 1379765Sandreas@sandberg.pp.se "tag_code" : "FTW = genX87Tags(FTW, TOP, spm);", 1389765Sandreas@sandberg.pp.se "top_code" : "TOP = (TOP + spm + 8) % 8;", 1399765Sandreas@sandberg.pp.se "op_class" : op_class}) 1405083Sgblack@eecs.umich.edu iop_top = InstObjParams(name, Name + suffix + "Top", base, 1415083Sgblack@eecs.umich.edu {"code" : code, 1425083Sgblack@eecs.umich.edu "flag_code" : flag_code, 1435083Sgblack@eecs.umich.edu "cond_check" : cond_check, 1445083Sgblack@eecs.umich.edu "else_code" : else_code, 1459765Sandreas@sandberg.pp.se "tag_code" : ";", 1469699Snilay@cs.wisc.edu "top_code" : "TOP = (TOP + spm + 8) % 8;", 1479699Snilay@cs.wisc.edu "op_class" : op_class}) 1485083Sgblack@eecs.umich.edu iop = InstObjParams(name, Name + suffix, base, 1495083Sgblack@eecs.umich.edu {"code" : code, 1505083Sgblack@eecs.umich.edu "flag_code" : flag_code, 1515083Sgblack@eecs.umich.edu "cond_check" : cond_check, 1525083Sgblack@eecs.umich.edu "else_code" : else_code, 1539765Sandreas@sandberg.pp.se "tag_code" : ";", 1549699Snilay@cs.wisc.edu "top_code" : ";", 1559699Snilay@cs.wisc.edu "op_class" : op_class}) 1565083Sgblack@eecs.umich.edu 1575083Sgblack@eecs.umich.edu # Generate the actual code (finally!) 1589765Sandreas@sandberg.pp.se header_output += MicroFpOpDeclare.subst(iop_tag) 1599765Sandreas@sandberg.pp.se decoder_output += MicroFpOpConstructor.subst(iop_tag) 1609765Sandreas@sandberg.pp.se exec_output += MicroFpOpExecute.subst(iop_tag) 1615083Sgblack@eecs.umich.edu header_output += MicroFpOpDeclare.subst(iop_top) 1625083Sgblack@eecs.umich.edu decoder_output += MicroFpOpConstructor.subst(iop_top) 1635083Sgblack@eecs.umich.edu exec_output += MicroFpOpExecute.subst(iop_top) 1645083Sgblack@eecs.umich.edu header_output += MicroFpOpDeclare.subst(iop) 1655083Sgblack@eecs.umich.edu decoder_output += MicroFpOpConstructor.subst(iop) 1665083Sgblack@eecs.umich.edu exec_output += MicroFpOpExecute.subst(iop) 1675083Sgblack@eecs.umich.edu 1685083Sgblack@eecs.umich.edu 1695083Sgblack@eecs.umich.edu def __new__(mcls, Name, bases, dict): 1705083Sgblack@eecs.umich.edu abstract = False 1715083Sgblack@eecs.umich.edu name = Name.lower() 1725083Sgblack@eecs.umich.edu if "abstract" in dict: 1735083Sgblack@eecs.umich.edu abstract = dict['abstract'] 1745083Sgblack@eecs.umich.edu del dict['abstract'] 1755083Sgblack@eecs.umich.edu 1765083Sgblack@eecs.umich.edu cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict) 1775083Sgblack@eecs.umich.edu if not abstract: 1785083Sgblack@eecs.umich.edu cls.className = Name 1795083Sgblack@eecs.umich.edu cls.mnemonic = name 1805083Sgblack@eecs.umich.edu code = cls.code 1815083Sgblack@eecs.umich.edu flag_code = cls.flag_code 1825083Sgblack@eecs.umich.edu cond_check = cls.cond_check 1835083Sgblack@eecs.umich.edu else_code = cls.else_code 1849699Snilay@cs.wisc.edu op_class = cls.op_class 1855083Sgblack@eecs.umich.edu 1865083Sgblack@eecs.umich.edu # Set up the C++ classes 1875083Sgblack@eecs.umich.edu mcls.buildCppClasses(cls, name, Name, "", 1889699Snilay@cs.wisc.edu code, flag_code, cond_check, else_code, op_class) 1895083Sgblack@eecs.umich.edu 1905083Sgblack@eecs.umich.edu # Hook into the microassembler dict 1915083Sgblack@eecs.umich.edu global microopClasses 1925083Sgblack@eecs.umich.edu microopClasses[name] = cls 1935083Sgblack@eecs.umich.edu 1945083Sgblack@eecs.umich.edu return cls 1955083Sgblack@eecs.umich.edu 1969371Snilay@cs.wisc.edu class FpUnaryOp(X86Microop): 1979371Snilay@cs.wisc.edu __metaclass__ = FpOpMeta 1989371Snilay@cs.wisc.edu # This class itself doesn't act as a microop 1999371Snilay@cs.wisc.edu abstract = True 2005083Sgblack@eecs.umich.edu 2019371Snilay@cs.wisc.edu # Default template parameter values 2029371Snilay@cs.wisc.edu flag_code = "" 2039371Snilay@cs.wisc.edu cond_check = "true" 2049371Snilay@cs.wisc.edu else_code = ";" 2059699Snilay@cs.wisc.edu op_class = "FloatAddOp" 2069371Snilay@cs.wisc.edu 2079371Snilay@cs.wisc.edu def __init__(self, dest, src1, spm=0, \ 2089765Sandreas@sandberg.pp.se SetStatus=False, UpdateFTW=True, dataSize="env.dataSize"): 2099371Snilay@cs.wisc.edu self.dest = dest 2109371Snilay@cs.wisc.edu self.src1 = src1 2119371Snilay@cs.wisc.edu self.src2 = "InstRegIndex(0)" 2129371Snilay@cs.wisc.edu self.spm = spm 2139371Snilay@cs.wisc.edu self.dataSize = dataSize 2149371Snilay@cs.wisc.edu if SetStatus: 2159371Snilay@cs.wisc.edu self.className += "Flags" 2169371Snilay@cs.wisc.edu if spm: 2179371Snilay@cs.wisc.edu self.className += "Top" 2189765Sandreas@sandberg.pp.se if spm and UpdateFTW: 2199765Sandreas@sandberg.pp.se self.className += "Tag" 2209371Snilay@cs.wisc.edu 2219371Snilay@cs.wisc.edu def getAllocator(self, microFlags): 2229371Snilay@cs.wisc.edu return '''new %(class_name)s(machInst, macrocodeBlock, 2239371Snilay@cs.wisc.edu %(flags)s, %(src1)s, %(src2)s, %(dest)s, 2249371Snilay@cs.wisc.edu %(dataSize)s, %(spm)d)''' % { 2259371Snilay@cs.wisc.edu "class_name" : self.className, 2269371Snilay@cs.wisc.edu "flags" : self.microFlagsText(microFlags), 2279371Snilay@cs.wisc.edu "src1" : self.src1, "src2" : self.src2, 2289371Snilay@cs.wisc.edu "dest" : self.dest, 2299371Snilay@cs.wisc.edu "dataSize" : self.dataSize, 2309371Snilay@cs.wisc.edu "spm" : self.spm} 2319371Snilay@cs.wisc.edu 2329371Snilay@cs.wisc.edu class FpBinaryOp(X86Microop): 2335083Sgblack@eecs.umich.edu __metaclass__ = FpOpMeta 2345083Sgblack@eecs.umich.edu # This class itself doesn't act as a microop 2355083Sgblack@eecs.umich.edu abstract = True 2365083Sgblack@eecs.umich.edu 2375083Sgblack@eecs.umich.edu # Default template parameter values 2385083Sgblack@eecs.umich.edu flag_code = "" 2395083Sgblack@eecs.umich.edu cond_check = "true" 2405083Sgblack@eecs.umich.edu else_code = ";" 2419699Snilay@cs.wisc.edu op_class = "FloatAddOp" 2425083Sgblack@eecs.umich.edu 2435083Sgblack@eecs.umich.edu def __init__(self, dest, src1, src2, spm=0, \ 2449765Sandreas@sandberg.pp.se SetStatus=False, UpdateFTW=True, dataSize="env.dataSize"): 2455083Sgblack@eecs.umich.edu self.dest = dest 2465083Sgblack@eecs.umich.edu self.src1 = src1 2475083Sgblack@eecs.umich.edu self.src2 = src2 2485083Sgblack@eecs.umich.edu self.spm = spm 2495083Sgblack@eecs.umich.edu self.dataSize = dataSize 2505083Sgblack@eecs.umich.edu if SetStatus: 2515083Sgblack@eecs.umich.edu self.className += "Flags" 2525083Sgblack@eecs.umich.edu if spm: 2535083Sgblack@eecs.umich.edu self.className += "Top" 2549765Sandreas@sandberg.pp.se if spm and UpdateFTW: 2559765Sandreas@sandberg.pp.se self.className += "Tag" 2565083Sgblack@eecs.umich.edu 2577620Sgblack@eecs.umich.edu def getAllocator(self, microFlags): 2587620Sgblack@eecs.umich.edu return '''new %(class_name)s(machInst, macrocodeBlock, 2595083Sgblack@eecs.umich.edu %(flags)s, %(src1)s, %(src2)s, %(dest)s, 2605083Sgblack@eecs.umich.edu %(dataSize)s, %(spm)d)''' % { 2615083Sgblack@eecs.umich.edu "class_name" : self.className, 2625083Sgblack@eecs.umich.edu "flags" : self.microFlagsText(microFlags), 2635083Sgblack@eecs.umich.edu "src1" : self.src1, "src2" : self.src2, 2645083Sgblack@eecs.umich.edu "dest" : self.dest, 2655083Sgblack@eecs.umich.edu "dataSize" : self.dataSize, 2665083Sgblack@eecs.umich.edu "spm" : self.spm} 2675083Sgblack@eecs.umich.edu 2689371Snilay@cs.wisc.edu class Movfp(FpUnaryOp): 2698588Sgblack@eecs.umich.edu code = 'FpDestReg_uqw = FpSrcReg1_uqw;' 2708588Sgblack@eecs.umich.edu else_code = 'FpDestReg_uqw = FpDestReg_uqw;' 2719211Snilay@cs.wisc.edu cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \ 2729211Snilay@cs.wisc.edu ecfBit | ezfBit, src2)" 2735083Sgblack@eecs.umich.edu 2749371Snilay@cs.wisc.edu class Xorfp(FpBinaryOp): 2758588Sgblack@eecs.umich.edu code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;' 2765083Sgblack@eecs.umich.edu 2779371Snilay@cs.wisc.edu class Sqrtfp(FpBinaryOp): 2785083Sgblack@eecs.umich.edu code = 'FpDestReg = sqrt(FpSrcReg2);' 2799699Snilay@cs.wisc.edu op_class = 'FloatSqrtOp' 2805083Sgblack@eecs.umich.edu 2819371Snilay@cs.wisc.edu class Cosfp(FpUnaryOp): 2829371Snilay@cs.wisc.edu code = 'FpDestReg = cos(FpSrcReg1);' 2839699Snilay@cs.wisc.edu op_class = 'FloatSqrtOp' 2849371Snilay@cs.wisc.edu 2859371Snilay@cs.wisc.edu class Sinfp(FpUnaryOp): 2869371Snilay@cs.wisc.edu code = 'FpDestReg = sin(FpSrcReg1);' 2879699Snilay@cs.wisc.edu op_class = 'FloatSqrtOp' 2889371Snilay@cs.wisc.edu 2899582Snilay@cs.wisc.edu class Tanfp(FpUnaryOp): 2909582Snilay@cs.wisc.edu code = 'FpDestReg = tan(FpSrcReg1);' 2919699Snilay@cs.wisc.edu op_class = 'FloatSqrtOp' 2929582Snilay@cs.wisc.edu 2939371Snilay@cs.wisc.edu 2945083Sgblack@eecs.umich.edu # Conversion microops 2959371Snilay@cs.wisc.edu class ConvOp(FpBinaryOp): 2965083Sgblack@eecs.umich.edu abstract = True 2979699Snilay@cs.wisc.edu op_class = 'FloatCvtOp' 2989894Sandreas@sandberg.pp.se def __init__(self, dest, src1, **kwargs): 2996345Sgblack@eecs.umich.edu super(ConvOp, self).__init__(dest, src1, \ 3009894Sandreas@sandberg.pp.se "InstRegIndex(FLOATREG_MICROFP0)", \ 3019894Sandreas@sandberg.pp.se **kwargs) 3025083Sgblack@eecs.umich.edu 3035083Sgblack@eecs.umich.edu # These probably shouldn't look at the ExtMachInst directly to figure 3045083Sgblack@eecs.umich.edu # out what size to use and should instead delegate that to the macroop's 3055083Sgblack@eecs.umich.edu # constructor. That would be more efficient, and it would make the 3065083Sgblack@eecs.umich.edu # microops a little more modular. 3075083Sgblack@eecs.umich.edu class cvtf_i2d(ConvOp): 3085083Sgblack@eecs.umich.edu code = ''' 3095083Sgblack@eecs.umich.edu X86IntReg intReg = SSrcReg1; 3105083Sgblack@eecs.umich.edu if (REX_W) 3115083Sgblack@eecs.umich.edu FpDestReg = intReg.SR; 3125083Sgblack@eecs.umich.edu else 3135083Sgblack@eecs.umich.edu FpDestReg = intReg.SE; 3145083Sgblack@eecs.umich.edu ''' 3155083Sgblack@eecs.umich.edu 3165083Sgblack@eecs.umich.edu class cvtf_i2d_hi(ConvOp): 3175083Sgblack@eecs.umich.edu code = 'FpDestReg = bits(SSrcReg1, 63, 32);' 3185083Sgblack@eecs.umich.edu 3195083Sgblack@eecs.umich.edu class cvtf_d2i(ConvOp): 3205083Sgblack@eecs.umich.edu code = ''' 3215083Sgblack@eecs.umich.edu int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1); 3225083Sgblack@eecs.umich.edu if (REX_W) 3235083Sgblack@eecs.umich.edu SDestReg = intSrcReg1; 3245083Sgblack@eecs.umich.edu else 3255083Sgblack@eecs.umich.edu SDestReg = merge(SDestReg, intSrcReg1, 4); 3265083Sgblack@eecs.umich.edu ''' 3275083Sgblack@eecs.umich.edu 3289894Sandreas@sandberg.pp.se # Convert two integers registers representing an 80-bit floating 3299894Sandreas@sandberg.pp.se # point number to an x87 register. 3309894Sandreas@sandberg.pp.se class cvtint_fp80(FpBinaryOp): 3319894Sandreas@sandberg.pp.se code = ''' 3329894Sandreas@sandberg.pp.se uint8_t bits[10]; 3339894Sandreas@sandberg.pp.se *(uint64_t *)(bits + 0) = SSrcReg1; 3349894Sandreas@sandberg.pp.se *(uint16_t *)(bits + 8) = (uint16_t)SSrcReg2; 3359894Sandreas@sandberg.pp.se FpDestReg = loadFloat80(bits); 3369894Sandreas@sandberg.pp.se ''' 3379894Sandreas@sandberg.pp.se 3389894Sandreas@sandberg.pp.se # Convert an x87 register (double) into extended precision and 3399894Sandreas@sandberg.pp.se # extract the highest 64 bits. 3409894Sandreas@sandberg.pp.se class cvtfp80h_int(ConvOp): 3419894Sandreas@sandberg.pp.se code = ''' 3429894Sandreas@sandberg.pp.se char bits[10]; 3439894Sandreas@sandberg.pp.se storeFloat80(bits, FpSrcReg1); 3449894Sandreas@sandberg.pp.se SDestReg = *(uint64_t *)(bits + 0); 3459894Sandreas@sandberg.pp.se ''' 3469894Sandreas@sandberg.pp.se 3479894Sandreas@sandberg.pp.se # Convert an x87 register (double) into extended precision and 3489894Sandreas@sandberg.pp.se # extract the lowest 16 bits. 3499894Sandreas@sandberg.pp.se class cvtfp80l_int(ConvOp): 3509894Sandreas@sandberg.pp.se code = ''' 3519894Sandreas@sandberg.pp.se char bits[10]; 3529894Sandreas@sandberg.pp.se storeFloat80(bits, FpSrcReg1); 3539894Sandreas@sandberg.pp.se SDestReg = *(uint16_t *)(bits + 8); 3549894Sandreas@sandberg.pp.se ''' 3559894Sandreas@sandberg.pp.se 3565083Sgblack@eecs.umich.edu # These need to consider size at some point. They'll always use doubles 3575083Sgblack@eecs.umich.edu # for the moment. 3589371Snilay@cs.wisc.edu class addfp(FpBinaryOp): 3595083Sgblack@eecs.umich.edu code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;' 3605083Sgblack@eecs.umich.edu 3619371Snilay@cs.wisc.edu class mulfp(FpBinaryOp): 3625083Sgblack@eecs.umich.edu code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;' 3639699Snilay@cs.wisc.edu op_class = 'FloatMultOp' 3645083Sgblack@eecs.umich.edu 3659371Snilay@cs.wisc.edu class divfp(FpBinaryOp): 3665083Sgblack@eecs.umich.edu code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;' 3679699Snilay@cs.wisc.edu op_class = 'FloatDivOp' 3685083Sgblack@eecs.umich.edu 3699371Snilay@cs.wisc.edu class subfp(FpBinaryOp): 3705083Sgblack@eecs.umich.edu code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;' 3715083Sgblack@eecs.umich.edu 3729582Snilay@cs.wisc.edu class Yl2xFp(FpBinaryOp): 3739582Snilay@cs.wisc.edu code = ''' 3749582Snilay@cs.wisc.edu FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2)); 3759582Snilay@cs.wisc.edu ''' 3769699Snilay@cs.wisc.edu op_class = 'FloatSqrtOp' 3779582Snilay@cs.wisc.edu 3789582Snilay@cs.wisc.edu class PremFp(FpBinaryOp): 3799582Snilay@cs.wisc.edu code = ''' 3809761Sandreas@sandberg.pp.se MiscReg new_fsw(FSW); 3819761Sandreas@sandberg.pp.se int src1_exp; 3829761Sandreas@sandberg.pp.se int src2_exp; 3839761Sandreas@sandberg.pp.se std::frexp(FpSrcReg1, &src1_exp); 3849761Sandreas@sandberg.pp.se std::frexp(FpSrcReg2, &src2_exp); 3859761Sandreas@sandberg.pp.se 3869761Sandreas@sandberg.pp.se const int d(src2_exp - src1_exp); 3879761Sandreas@sandberg.pp.se if (d < 64) { 3889761Sandreas@sandberg.pp.se const int64_t q(std::trunc(FpSrcReg2 / FpSrcReg1)); 3899761Sandreas@sandberg.pp.se FpDestReg = FpSrcReg2 - FpSrcReg1 * q; 3909761Sandreas@sandberg.pp.se new_fsw &= ~(CC0Bit | CC1Bit | CC2Bit | CC2Bit); 3919761Sandreas@sandberg.pp.se new_fsw |= (q & 0x1) ? CC1Bit : 0; 3929761Sandreas@sandberg.pp.se new_fsw |= (q & 0x2) ? CC3Bit : 0; 3939761Sandreas@sandberg.pp.se new_fsw |= (q & 0x4) ? CC0Bit : 0; 3949761Sandreas@sandberg.pp.se } else { 3959761Sandreas@sandberg.pp.se const int n(42); 3969761Sandreas@sandberg.pp.se const int64_t qq(std::trunc( 3979761Sandreas@sandberg.pp.se FpSrcReg2 / std::ldexp(FpSrcReg1, d - n))); 3989761Sandreas@sandberg.pp.se FpDestReg = FpSrcReg2 - std::ldexp(FpSrcReg1 * qq, d - n); 3999761Sandreas@sandberg.pp.se new_fsw |= CC2Bit; 4009761Sandreas@sandberg.pp.se } 4019761Sandreas@sandberg.pp.se DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf, FSW: 0x%x\\n", 4029761Sandreas@sandberg.pp.se FpSrcReg1, FpSrcReg2, FpDestReg, new_fsw); 4039582Snilay@cs.wisc.edu ''' 4049699Snilay@cs.wisc.edu op_class = 'FloatDivOp' 4059582Snilay@cs.wisc.edu 4069761Sandreas@sandberg.pp.se flag_code = 'FSW = new_fsw;' 4079761Sandreas@sandberg.pp.se 4089371Snilay@cs.wisc.edu class Compfp(FpBinaryOp): 4099765Sandreas@sandberg.pp.se def __init__(self, src1, src2, spm=0, setStatus=False, updateFTW=True, \ 4105083Sgblack@eecs.umich.edu dataSize="env.dataSize"): 4116345Sgblack@eecs.umich.edu super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \ 4129765Sandreas@sandberg.pp.se src1, src2, spm, setStatus, updateFTW, dataSize) 4135083Sgblack@eecs.umich.edu # This class sets the condition codes in rflags according to the 4145083Sgblack@eecs.umich.edu # rules for comparing floating point. 4155083Sgblack@eecs.umich.edu code = ''' 4165083Sgblack@eecs.umich.edu // ZF PF CF 4175083Sgblack@eecs.umich.edu // Unordered 1 1 1 4185083Sgblack@eecs.umich.edu // Greater than 0 0 0 4195083Sgblack@eecs.umich.edu // Less than 0 0 1 4205083Sgblack@eecs.umich.edu // Equal 1 0 0 4215083Sgblack@eecs.umich.edu // OF = SF = AF = 0 4229010Snilay@cs.wisc.edu ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit); 4239010Snilay@cs.wisc.edu cfofBits = cfofBits & ~(OFBit | CFBit); 4249010Snilay@cs.wisc.edu 4259010Snilay@cs.wisc.edu if (std::isnan(FpSrcReg1) || std::isnan(FpSrcReg2)) { 4269010Snilay@cs.wisc.edu ccFlagBits = ccFlagBits | (ZFBit | PFBit); 4279010Snilay@cs.wisc.edu cfofBits = cfofBits | CFBit; 4289010Snilay@cs.wisc.edu } 4295083Sgblack@eecs.umich.edu else if(FpSrcReg1 < FpSrcReg2) 4309010Snilay@cs.wisc.edu cfofBits = cfofBits | CFBit; 4315083Sgblack@eecs.umich.edu else if(FpSrcReg1 == FpSrcReg2) 4325083Sgblack@eecs.umich.edu ccFlagBits = ccFlagBits | ZFBit; 4335083Sgblack@eecs.umich.edu ''' 4349699Snilay@cs.wisc.edu op_class = 'FloatCmpOp' 4359470Snilay@cs.wisc.edu 4369470Snilay@cs.wisc.edu class absfp(FpUnaryOp): 4379470Snilay@cs.wisc.edu code = 'FpDestReg = fabs(FpSrcReg1);' 4389758Sandreas@sandberg.pp.se flag_code = 'FSW = FSW & (~CC1Bit);' 4399470Snilay@cs.wisc.edu 4409470Snilay@cs.wisc.edu class chsfp(FpUnaryOp): 4419470Snilay@cs.wisc.edu code = 'FpDestReg = (-1) * (FpSrcReg1);' 4429758Sandreas@sandberg.pp.se flag_code = 'FSW = FSW & (~CC1Bit);' 4439893Sandreas@sandberg.pp.se 4449893Sandreas@sandberg.pp.se class Pop87(FpUnaryOp): 4459893Sandreas@sandberg.pp.se def __init__(self, spm=1, UpdateFTW=True): 4469893Sandreas@sandberg.pp.se super(Pop87, self).__init__( \ 4479893Sandreas@sandberg.pp.se "InstRegIndex(FLOATREG_MICROFP0)", \ 4489893Sandreas@sandberg.pp.se "InstRegIndex(FLOATREG_MICROFP0)", \ 4499893Sandreas@sandberg.pp.se spm=spm, SetStatus=False, UpdateFTW=UpdateFTW) 4509893Sandreas@sandberg.pp.se 4519893Sandreas@sandberg.pp.se code = '' 4525083Sgblack@eecs.umich.edu}}; 453