microasm.isa revision 5899:b702f4fdf16c 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use.  Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21//     Director of Intellectual Property Licensing
22//     Office of Strategy and Technology
23//     Hewlett-Packard Company
24//     1501 Page Mill Road
25//     Palo Alto, California  94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer.  Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution.  Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission.  No right of
35// sublicense is granted herewith.  Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses.  Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67//Include code to fill out the microcode ROM in both C++ and python.
68##include "rom.isa"
69
70let {{
71    import sys
72    sys.path[0:0] = ["src/arch/x86/isa/"]
73    from insts import microcode
74    # print microcode
75    from micro_asm import MicroAssembler, Rom_Macroop
76    mainRom = X86MicrocodeRom('main ROM')
77    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
78    # Add in symbols for the microcode registers
79    for num in range(16):
80        assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
81    for num in range(8):
82        assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
83    # Add in symbols for the segment descriptor registers
84    for letter in ("C", "D", "E", "F", "G", "H", "S"):
85        assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
86
87    # Add in symbols for the various checks of segment selectors.
88    for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
89                  "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
90                  "TRCheck"):
91        assembler.symbols[check] = "Seg%s" % check
92
93    for reg in ("TR", "IDTR"):
94        assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg
95
96    for reg in ("TSL", "TSG"):
97        assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg
98
99    # Miscellaneous symbols
100    symbols = {
101        "reg" : "env.reg",
102        "xmml" : "FLOATREG_XMM_LOW(env.reg)",
103        "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
104        "regm" : "env.regm",
105        "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
106        "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
107        "imm" : "adjustedImm",
108        "disp" : "adjustedDisp",
109        "seg" : "env.seg",
110        "scale" : "env.scale",
111        "index" : "env.index",
112        "base" : "env.base",
113        "dsz" : "env.dataSize",
114        "asz" : "env.addressSize",
115        "ssz" : "env.stackSize"
116    }
117    assembler.symbols.update(symbols)
118
119    assembler.symbols["ldsz"] = \
120        "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
121
122    assembler.symbols["lasz"] = \
123        "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
124
125    assembler.symbols["lssz"] = \
126        "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
127
128    # Short hand for common scale-index-base combinations.
129    assembler.symbols["sib"] = \
130        [symbols["scale"], symbols["index"], symbols["base"]]
131    assembler.symbols["riprel"] = \
132        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
133
134    # This segment selects an internal address space mapped to MSRs,
135    # CPUID info, etc.
136    assembler.symbols["intseg"] = "SEGMENT_REG_MS"
137    # This segment always has base 0, and doesn't imply any special handling
138    # like the internal segment above
139    assembler.symbols["flatseg"] = "SEGMENT_REG_LS"
140
141    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
142        assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
143
144    for reg in range(16):
145        assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg
146
147    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
148                 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
149        assembler.symbols[flag] = flag + "Bit"
150
151    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
152                 'MSTRZ', 'STRZ', 'MSTRC',
153                 'OF', 'CF', 'ZF', 'CvZF',
154                 'SF', 'PF', 'SxOF', 'SxOvZF'):
155        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
156        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
157    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
158    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
159
160    assembler.symbols["CTrue"] = "ConditionTests::True"
161    assembler.symbols["CFalse"] = "ConditionTests::False"
162
163    for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
164                'star', 'lstar', 'cstar', 'sf_mask',
165                'kernel_gs_base'):
166        assembler.symbols[reg] = "MISCREG_%s" % reg.upper()
167
168    # Code literal which forces a default 64 bit operand size in 64 bit mode.
169    assembler.symbols["oszIn64Override"] = '''
170    if (machInst.mode.submode == SixtyFourBitMode &&
171            env.dataSize == 4)
172        env.dataSize = 8;
173    '''
174
175    assembler.symbols["oszForPseudoDesc"] = '''
176    if (machInst.mode.submode == SixtyFourBitMode)
177        env.dataSize = 8;
178    else
179        env.dataSize = 4;
180    '''
181
182    def trimImm(width):
183        return "adjustedImm = adjustedImm & mask(%s);" % width
184
185    assembler.symbols["trimImm"] = trimImm
186
187    def labeler(labelStr):
188        return "label_%s" % labelStr
189
190    assembler.symbols["label"] = labeler
191
192    def rom_labeler(labelStr):
193        return "romMicroPC(RomLabels::extern_label_%s)" % labelStr
194
195    assembler.symbols["rom_label"] = rom_labeler
196
197    def rom_local_labeler(labelStr):
198        return "romMicroPC(RomLabels::label_%s)" % labelStr
199
200    assembler.symbols["rom_local_label"] = rom_local_labeler
201
202    def stack_index(index):
203        return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
204
205    assembler.symbols["st"] = stack_index
206
207    macroopDict = assembler.assemble(microcode)
208
209    decoder_output += mainRom.getDefinition()
210    header_output += mainRom.getDeclaration()
211}};
212