microasm.isa revision 5121:a5f3cfdc4ee5 
1// -*- mode:c++ -*-
2
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56// Authors: Gabe Black
57
58//Include the definitions of the micro ops.
59//These are python representations of static insts which stand on their own
60//and make up an internal instruction set. They are used by the micro
61//assembler.
62##include "microops/microops.isa"
63
64//Include code to build macroops in both C++ and python.
65##include "macroop.isa"
66
67let {{
68    import sys
69    sys.path[0:0] = ["src/arch/x86/isa/"]
70    from insts import microcode
71    # print microcode
72    from micro_asm import MicroAssembler, Rom_Macroop, Rom
73    mainRom = Rom('main ROM')
74    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
75    # Add in symbols for the microcode registers
76    for num in range(15):
77        assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num
78    for num in range(7):
79        assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num
80    # Add in symbols for the segment descriptor registers
81    for letter in ("C", "D", "E", "F", "G", "S"):
82        assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter
83    # Miscellaneous symbols
84    symbols = {
85        "reg" : "env.reg",
86        "xmml" : "FLOATREG_XMM_LOW(env.reg)",
87        "xmmh" : "FLOATREG_XMM_HIGH(env.reg)",
88        "regm" : "env.regm",
89        "xmmlm" : "FLOATREG_XMM_LOW(env.regm)",
90        "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)",
91        "imm" : "IMMEDIATE",
92        "disp" : "DISPLACEMENT",
93        "seg" : "env.seg",
94        "scale" : "env.scale",
95        "index" : "env.index",
96        "base" : "env.base",
97        "dsz" : "env.dataSize",
98        "asz" : "env.addressSize",
99        "ssz" : "env.stackSize"
100    }
101    assembler.symbols.update(symbols)
102
103    # Short hand for common scale-index-base combinations.
104    assembler.symbols["sib"] = \
105        [symbols["scale"], symbols["index"], symbols["base"]]
106    assembler.symbols["riprel"] = \
107        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
108
109    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'):
110        assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper()
111
112    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF'):
113        assembler.symbols[flag] = flag + "Bit"
114
115    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
116                 'MSTRZ', 'STRZ', 'MSTRC',
117                 'OF', 'CF', 'ZF', 'CvZF',
118                 'SF', 'PF', 'SxOF', 'SxOvZF'):
119        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
120        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
121    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
122    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
123
124    assembler.symbols["CTrue"] = "ConditionTests::True"
125    assembler.symbols["CFalse"] = "ConditionTests::False"
126
127    # Code literal which forces a default 64 bit operand size in 64 bit mode.
128    assembler.symbols["oszIn64Override"] = '''
129    if (machInst.mode.submode == SixtyFourBitMode &&
130            env.dataSize == 4)
131        env.dataSize = 8;
132    '''
133
134    def labeler(labelStr):
135        return "label_%s" % labelStr
136
137    assembler.symbols["label"] = labeler
138
139    def stack_index(index):
140        return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
141
142    assembler.symbols["st"] = stack_index
143
144    macroopDict = assembler.assemble(microcode)
145}};
146