microasm.isa revision 6517
14309Sgblack@eecs.umich.edu// -*- mode:c++ -*-
24309Sgblack@eecs.umich.edu
35426Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
44309Sgblack@eecs.umich.edu// All rights reserved.
54309Sgblack@eecs.umich.edu//
64309Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms,
74309Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the
84309Sgblack@eecs.umich.edu// following conditions are met:
94309Sgblack@eecs.umich.edu//
104309Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any
114309Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary
124309Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use.  Illustrative
134309Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study,
144309Sgblack@eecs.umich.edu// teaching, education and corporate research & development.
154309Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for
164309Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for
174309Sgblack@eecs.umich.edu// commercial advantage.
184309Sgblack@eecs.umich.edu//
194309Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be
204309Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact:
214309Sgblack@eecs.umich.edu//     Director of Intellectual Property Licensing
224309Sgblack@eecs.umich.edu//     Office of Strategy and Technology
234309Sgblack@eecs.umich.edu//     Hewlett-Packard Company
244309Sgblack@eecs.umich.edu//     1501 Page Mill Road
254309Sgblack@eecs.umich.edu//     Palo Alto, California  94304
264309Sgblack@eecs.umich.edu//
274309Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice,
284309Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer.  Redistributions
294309Sgblack@eecs.umich.edu// in binary form must reproduce the above copyright notice, this list of
304309Sgblack@eecs.umich.edu// conditions and the following disclaimer in the documentation and/or
314309Sgblack@eecs.umich.edu// other materials provided with the distribution.  Neither the name of
324309Sgblack@eecs.umich.edu// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
334309Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from
344309Sgblack@eecs.umich.edu// this software without specific prior written permission.  No right of
354309Sgblack@eecs.umich.edu// sublicense is granted herewith.  Derivatives of the software and
364309Sgblack@eecs.umich.edu// output created using the software may be prepared, but only for
374309Sgblack@eecs.umich.edu// Non-Commercial Uses.  Derivatives of the software may be shared with
384309Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of
394309Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions;
404309Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright
414309Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where
424309Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below.
434309Sgblack@eecs.umich.edu//
444309Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
454309Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
464309Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
474309Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
484309Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
494309Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
504309Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
514309Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
524309Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
534309Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
544309Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
554309Sgblack@eecs.umich.edu//
564309Sgblack@eecs.umich.edu// Authors: Gabe Black
574309Sgblack@eecs.umich.edu
584533Sgblack@eecs.umich.edu//Include the definitions of the micro ops.
594679Sgblack@eecs.umich.edu//These are python representations of static insts which stand on their own
604679Sgblack@eecs.umich.edu//and make up an internal instruction set. They are used by the micro
614679Sgblack@eecs.umich.edu//assembler.
624533Sgblack@eecs.umich.edu##include "microops/microops.isa"
634533Sgblack@eecs.umich.edu
644537Sgblack@eecs.umich.edu//Include code to build macroops in both C++ and python.
654533Sgblack@eecs.umich.edu##include "macroop.isa"
664528Sgblack@eecs.umich.edu
675666Sgblack@eecs.umich.edu//Include code to fill out the microcode ROM in both C++ and python.
685666Sgblack@eecs.umich.edu##include "rom.isa"
695666Sgblack@eecs.umich.edu
704528Sgblack@eecs.umich.edulet {{
714528Sgblack@eecs.umich.edu    import sys
724528Sgblack@eecs.umich.edu    sys.path[0:0] = ["src/arch/x86/isa/"]
734528Sgblack@eecs.umich.edu    from insts import microcode
744605Sgblack@eecs.umich.edu    # print microcode
755666Sgblack@eecs.umich.edu    from micro_asm import MicroAssembler, Rom_Macroop
765666Sgblack@eecs.umich.edu    mainRom = X86MicrocodeRom('main ROM')
774528Sgblack@eecs.umich.edu    assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop)
786345Sgblack@eecs.umich.edu
796345Sgblack@eecs.umich.edu    def regIdx(idx):
806345Sgblack@eecs.umich.edu        return "InstRegIndex(%s)" % idx
816345Sgblack@eecs.umich.edu
826345Sgblack@eecs.umich.edu    assembler.symbols["regIdx"] = regIdx
836345Sgblack@eecs.umich.edu
844615Sgblack@eecs.umich.edu    # Add in symbols for the microcode registers
855854Sgblack@eecs.umich.edu    for num in range(16):
866345Sgblack@eecs.umich.edu        assembler.symbols["t%d" % num] = regIdx("NUM_INTREGS+%d" % num)
875854Sgblack@eecs.umich.edu    for num in range(8):
886345Sgblack@eecs.umich.edu        assembler.symbols["ufp%d" % num] = \
896345Sgblack@eecs.umich.edu            regIdx("FLOATREG_MICROFP(%d)" % num)
904615Sgblack@eecs.umich.edu    # Add in symbols for the segment descriptor registers
915671Sgblack@eecs.umich.edu    for letter in ("C", "D", "E", "F", "G", "H", "S"):
926345Sgblack@eecs.umich.edu        assembler.symbols["%ss" % letter.lower()] = \
936345Sgblack@eecs.umich.edu            regIdx("SEGMENT_REG_%sS" % letter)
945291Sgblack@eecs.umich.edu
955428Sgblack@eecs.umich.edu    # Add in symbols for the various checks of segment selectors.
965674Sgblack@eecs.umich.edu    for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck",
975899Sgblack@eecs.umich.edu                  "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck",
985936Sgblack@eecs.umich.edu                  "TRCheck", "TSSCheck", "InGDTCheck", "LDTCheck"):
995428Sgblack@eecs.umich.edu        assembler.symbols[check] = "Seg%s" % check
1005428Sgblack@eecs.umich.edu
1015294Sgblack@eecs.umich.edu    for reg in ("TR", "IDTR"):
1026345Sgblack@eecs.umich.edu        assembler.symbols[reg.lower()] = regIdx("SYS_SEGMENT_REG_%s" % reg)
1035291Sgblack@eecs.umich.edu
1045294Sgblack@eecs.umich.edu    for reg in ("TSL", "TSG"):
1056345Sgblack@eecs.umich.edu        assembler.symbols[reg.lower()] = regIdx("SEGMENT_REG_%s" % reg)
1065294Sgblack@eecs.umich.edu
1074615Sgblack@eecs.umich.edu    # Miscellaneous symbols
1084615Sgblack@eecs.umich.edu    symbols = {
1096345Sgblack@eecs.umich.edu        "reg" : regIdx("env.reg"),
1106345Sgblack@eecs.umich.edu        "xmml" : regIdx("FLOATREG_XMM_LOW(env.reg)"),
1116345Sgblack@eecs.umich.edu        "xmmh" : regIdx("FLOATREG_XMM_HIGH(env.reg)"),
1126345Sgblack@eecs.umich.edu        "regm" : regIdx("env.regm"),
1136345Sgblack@eecs.umich.edu        "xmmlm" : regIdx("FLOATREG_XMM_LOW(env.regm)"),
1146345Sgblack@eecs.umich.edu        "xmmhm" : regIdx("FLOATREG_XMM_HIGH(env.regm)"),
1156517Sgblack@eecs.umich.edu        "mmx" : regIdx("FLOATREG_MMX(env.reg)"),
1166517Sgblack@eecs.umich.edu        "mmxm" : regIdx("FLOATREG_MMX(env.regm)"),
1175161Sgblack@eecs.umich.edu        "imm" : "adjustedImm",
1185161Sgblack@eecs.umich.edu        "disp" : "adjustedDisp",
1196345Sgblack@eecs.umich.edu        "seg" : regIdx("env.seg"),
1204615Sgblack@eecs.umich.edu        "scale" : "env.scale",
1216345Sgblack@eecs.umich.edu        "index" : regIdx("env.index"),
1226345Sgblack@eecs.umich.edu        "base" : regIdx("env.base"),
1234615Sgblack@eecs.umich.edu        "dsz" : "env.dataSize",
1244953Sgblack@eecs.umich.edu        "asz" : "env.addressSize",
1254615Sgblack@eecs.umich.edu        "ssz" : "env.stackSize"
1264615Sgblack@eecs.umich.edu    }
1274863Sgblack@eecs.umich.edu    assembler.symbols.update(symbols)
1284863Sgblack@eecs.umich.edu
1295326Sgblack@eecs.umich.edu    assembler.symbols["ldsz"] = \
1305326Sgblack@eecs.umich.edu        "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)"
1315326Sgblack@eecs.umich.edu
1325326Sgblack@eecs.umich.edu    assembler.symbols["lasz"] = \
1335326Sgblack@eecs.umich.edu        "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)"
1345326Sgblack@eecs.umich.edu
1355326Sgblack@eecs.umich.edu    assembler.symbols["lssz"] = \
1365326Sgblack@eecs.umich.edu        "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)"
1375326Sgblack@eecs.umich.edu
1384863Sgblack@eecs.umich.edu    # Short hand for common scale-index-base combinations.
1394863Sgblack@eecs.umich.edu    assembler.symbols["sib"] = \
1404863Sgblack@eecs.umich.edu        [symbols["scale"], symbols["index"], symbols["base"]]
1414863Sgblack@eecs.umich.edu    assembler.symbols["riprel"] = \
1424863Sgblack@eecs.umich.edu        ["1", assembler.symbols["t0"], assembler.symbols["t7"]]
1434620Sgblack@eecs.umich.edu
1445149Sgblack@eecs.umich.edu    # This segment selects an internal address space mapped to MSRs,
1455149Sgblack@eecs.umich.edu    # CPUID info, etc.
1466345Sgblack@eecs.umich.edu    assembler.symbols["intseg"] = regIdx("SEGMENT_REG_MS")
1475294Sgblack@eecs.umich.edu    # This segment always has base 0, and doesn't imply any special handling
1485294Sgblack@eecs.umich.edu    # like the internal segment above
1496345Sgblack@eecs.umich.edu    assembler.symbols["flatseg"] = regIdx("SEGMENT_REG_LS")
1505149Sgblack@eecs.umich.edu
1515906Sgblack@eecs.umich.edu    for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \
1525906Sgblack@eecs.umich.edu                '8',  '9',  '10', '11', '12', '13', '14', '15'):
1536345Sgblack@eecs.umich.edu        assembler.symbols["r%s" % reg] = \
1546345Sgblack@eecs.umich.edu            regIdx("INTREG_R%s" % reg.upper())
1554615Sgblack@eecs.umich.edu
1566457Sgblack@eecs.umich.edu    for reg in ('ah', 'bh', 'ch', 'dh'):
1576457Sgblack@eecs.umich.edu        assembler.symbols[reg] = \
1586457Sgblack@eecs.umich.edu            regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper())
1596457Sgblack@eecs.umich.edu
1605854Sgblack@eecs.umich.edu    for reg in range(16):
1616345Sgblack@eecs.umich.edu        assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg)
1625241Sgblack@eecs.umich.edu
1635426Sgblack@eecs.umich.edu    for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \
1645426Sgblack@eecs.umich.edu                 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'):
1654686Sgblack@eecs.umich.edu        assembler.symbols[flag] = flag + "Bit"
1664686Sgblack@eecs.umich.edu
1674686Sgblack@eecs.umich.edu    for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF',
1684953Sgblack@eecs.umich.edu                 'MSTRZ', 'STRZ', 'MSTRC',
1694686Sgblack@eecs.umich.edu                 'OF', 'CF', 'ZF', 'CvZF',
1704686Sgblack@eecs.umich.edu                 'SF', 'PF', 'SxOF', 'SxOvZF'):
1714686Sgblack@eecs.umich.edu        assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
1724686Sgblack@eecs.umich.edu        assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
1734953Sgblack@eecs.umich.edu    assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
1744953Sgblack@eecs.umich.edu    assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
1754686Sgblack@eecs.umich.edu
1764686Sgblack@eecs.umich.edu    assembler.symbols["CTrue"] = "ConditionTests::True"
1774686Sgblack@eecs.umich.edu    assembler.symbols["CFalse"] = "ConditionTests::False"
1784686Sgblack@eecs.umich.edu
1795682Sgblack@eecs.umich.edu    for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
1805682Sgblack@eecs.umich.edu                'star', 'lstar', 'cstar', 'sf_mask',
1815682Sgblack@eecs.umich.edu                'kernel_gs_base'):
1826345Sgblack@eecs.umich.edu        assembler.symbols[reg] = regIdx("MISCREG_%s" % reg.upper())
1835682Sgblack@eecs.umich.edu
1844615Sgblack@eecs.umich.edu    # Code literal which forces a default 64 bit operand size in 64 bit mode.
1854615Sgblack@eecs.umich.edu    assembler.symbols["oszIn64Override"] = '''
1864615Sgblack@eecs.umich.edu    if (machInst.mode.submode == SixtyFourBitMode &&
1874615Sgblack@eecs.umich.edu            env.dataSize == 4)
1884615Sgblack@eecs.umich.edu        env.dataSize = 8;
1894615Sgblack@eecs.umich.edu    '''
1904615Sgblack@eecs.umich.edu
1915930Sgblack@eecs.umich.edu    assembler.symbols["maxOsz"] = '''
1925291Sgblack@eecs.umich.edu    if (machInst.mode.submode == SixtyFourBitMode)
1935291Sgblack@eecs.umich.edu        env.dataSize = 8;
1945291Sgblack@eecs.umich.edu    else
1955291Sgblack@eecs.umich.edu        env.dataSize = 4;
1965291Sgblack@eecs.umich.edu    '''
1975291Sgblack@eecs.umich.edu
1985161Sgblack@eecs.umich.edu    def trimImm(width):
1995161Sgblack@eecs.umich.edu        return "adjustedImm = adjustedImm & mask(%s);" % width
2005161Sgblack@eecs.umich.edu
2015161Sgblack@eecs.umich.edu    assembler.symbols["trimImm"] = trimImm
2025161Sgblack@eecs.umich.edu
2035008Sgblack@eecs.umich.edu    def labeler(labelStr):
2045008Sgblack@eecs.umich.edu        return "label_%s" % labelStr
2055008Sgblack@eecs.umich.edu
2065008Sgblack@eecs.umich.edu    assembler.symbols["label"] = labeler
2075008Sgblack@eecs.umich.edu
2085667Sgblack@eecs.umich.edu    def rom_labeler(labelStr):
2095667Sgblack@eecs.umich.edu        return "romMicroPC(RomLabels::extern_label_%s)" % labelStr
2105667Sgblack@eecs.umich.edu
2115667Sgblack@eecs.umich.edu    assembler.symbols["rom_label"] = rom_labeler
2125667Sgblack@eecs.umich.edu
2135676Sgblack@eecs.umich.edu    def rom_local_labeler(labelStr):
2145676Sgblack@eecs.umich.edu        return "romMicroPC(RomLabels::label_%s)" % labelStr
2155676Sgblack@eecs.umich.edu
2165676Sgblack@eecs.umich.edu    assembler.symbols["rom_local_label"] = rom_local_labeler
2175676Sgblack@eecs.umich.edu
2185082Sgblack@eecs.umich.edu    def stack_index(index):
2196345Sgblack@eecs.umich.edu        return regIdx("NUM_FLOATREGS + (((%s) + 8) %% 8)" % index)
2205082Sgblack@eecs.umich.edu
2215082Sgblack@eecs.umich.edu    assembler.symbols["st"] = stack_index
2225082Sgblack@eecs.umich.edu
2234528Sgblack@eecs.umich.edu    macroopDict = assembler.assemble(microcode)
2245666Sgblack@eecs.umich.edu
2255666Sgblack@eecs.umich.edu    decoder_output += mainRom.getDefinition()
2265666Sgblack@eecs.umich.edu    header_output += mainRom.getDeclaration()
2274528Sgblack@eecs.umich.edu}};
228