microasm.isa revision 5930
110923SN/A// -*- mode:c++ -*- 210923SN/A 310923SN/A// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 410923SN/A// All rights reserved. 510923SN/A// 610923SN/A// Redistribution and use of this software in source and binary forms, 710923SN/A// with or without modification, are permitted provided that the 810923SN/A// following conditions are met: 910923SN/A// 1010923SN/A// The software must be used only for Non-Commercial Use which means any 1110923SN/A// use which is NOT directed to receiving any direct monetary 1210923SN/A// compensation for, or commercial advantage from such use. Illustrative 134486SN/A// examples of non-commercial use are academic research, personal study, 144486SN/A// teaching, education and corporate research & development. 154486SN/A// Illustrative examples of commercial use are distributing products for 164486SN/A// commercial advantage and providing services using the software for 174486SN/A// commercial advantage. 184486SN/A// 194486SN/A// If you wish to use this software or functionality therein that may be 204486SN/A// covered by patents for commercial use, please contact: 214486SN/A// Director of Intellectual Property Licensing 224486SN/A// Office of Strategy and Technology 234486SN/A// Hewlett-Packard Company 244486SN/A// 1501 Page Mill Road 254486SN/A// Palo Alto, California 94304 264486SN/A// 274486SN/A// Redistributions of source code must retain the above copyright notice, 284486SN/A// this list of conditions and the following disclaimer. Redistributions 294486SN/A// in binary form must reproduce the above copyright notice, this list of 304486SN/A// conditions and the following disclaimer in the documentation and/or 314486SN/A// other materials provided with the distribution. Neither the name of 324486SN/A// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 334486SN/A// contributors may be used to endorse or promote products derived from 344486SN/A// this software without specific prior written permission. No right of 354486SN/A// sublicense is granted herewith. Derivatives of the software and 364486SN/A// output created using the software may be prepared, but only for 374486SN/A// Non-Commercial Uses. Derivatives of the software may be shared with 384486SN/A// others provided: (i) the others agree to abide by the list of 394486SN/A// conditions herein which includes the Non-Commercial Use restrictions; 404486SN/A// and (ii) such Derivatives of the software include the above copyright 413102SN/A// notice to acknowledge the contribution from this software where 423102SN/A// applicable, this list of conditions and the disclaimer below. 433102SN/A// 4411260SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 451310SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 464981SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 474981SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 481310SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 4911263Sandreas.sandberg@arm.com// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 501310SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 514981SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 521366SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 5311263Sandreas.sandberg@arm.com// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 548839SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 558839SN/A// 561634SN/A// Authors: Gabe Black 571952SN/A 581702SN/A//Include the definitions of the micro ops. 591310SN/A//These are python representations of static insts which stand on their own 601310SN/A//and make up an internal instruction set. They are used by the micro 6111290Sgabor.dozsa@arm.com//assembler. 6211290Sgabor.dozsa@arm.com##include "microops/microops.isa" 6311290Sgabor.dozsa@arm.com 6410923SN/A//Include code to build macroops in both C++ and python. 6510923SN/A##include "macroop.isa" 6610923SN/A 6710923SN/A//Include code to fill out the microcode ROM in both C++ and python. 6810923SN/A##include "rom.isa" 6911290Sgabor.dozsa@arm.com 7011290Sgabor.dozsa@arm.comlet {{ 7111290Sgabor.dozsa@arm.com import sys 7211290Sgabor.dozsa@arm.com sys.path[0:0] = ["src/arch/x86/isa/"] 7310923SN/A from insts import microcode 7410923SN/A # print microcode 7511290Sgabor.dozsa@arm.com from micro_asm import MicroAssembler, Rom_Macroop 7611703Smichael.lebeane@amd.com mainRom = X86MicrocodeRom('main ROM') 7711290Sgabor.dozsa@arm.com assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop) 7810923SN/A # Add in symbols for the microcode registers 794981SN/A for num in range(16): 801366SN/A assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num 8111263Sandreas.sandberg@arm.com for num in range(8): 821634SN/A assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num 831310SN/A # Add in symbols for the segment descriptor registers 841634SN/A for letter in ("C", "D", "E", "F", "G", "H", "S"): 851310SN/A assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter 8611317Sm.alian1369@gmail.com 8711317Sm.alian1369@gmail.com # Add in symbols for the various checks of segment selectors. 8811317Sm.alian1369@gmail.com for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck", 8911317Sm.alian1369@gmail.com "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck", 9011317Sm.alian1369@gmail.com "TRCheck", "TSSCheck"): 9111317Sm.alian1369@gmail.com assembler.symbols[check] = "Seg%s" % check 9211317Sm.alian1369@gmail.com 9311317Sm.alian1369@gmail.com for reg in ("TR", "IDTR"): 9411317Sm.alian1369@gmail.com assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg 9511317Sm.alian1369@gmail.com 9611317Sm.alian1369@gmail.com for reg in ("TSL", "TSG"): 9711317Sm.alian1369@gmail.com assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg 9812055Sgabeblack@google.com 9912055Sgabeblack@google.com # Miscellaneous symbols 10012055Sgabeblack@google.com symbols = { 10111263Sandreas.sandberg@arm.com "reg" : "env.reg", 1021310SN/A "xmml" : "FLOATREG_XMM_LOW(env.reg)", 1031310SN/A "xmmh" : "FLOATREG_XMM_HIGH(env.reg)", 10412055Sgabeblack@google.com "regm" : "env.regm", 10512055Sgabeblack@google.com "xmmlm" : "FLOATREG_XMM_LOW(env.regm)", 10612055Sgabeblack@google.com "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)", 10712055Sgabeblack@google.com "imm" : "adjustedImm", 10812055Sgabeblack@google.com "disp" : "adjustedDisp", 10912054Sgabeblack@google.com "seg" : "env.seg", 1101310SN/A "scale" : "env.scale", 1111692SN/A "index" : "env.index", 1121366SN/A "base" : "env.base", 11311263Sandreas.sandberg@arm.com "dsz" : "env.dataSize", 1141310SN/A "asz" : "env.addressSize", 1151880SN/A "ssz" : "env.stackSize" 1161310SN/A } 1174981SN/A assembler.symbols.update(symbols) 1184981SN/A 1194981SN/A assembler.symbols["ldsz"] = \ 12011263Sandreas.sandberg@arm.com "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)" 1218839SN/A 1224981SN/A assembler.symbols["lasz"] = \ 1234981SN/A "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)" 1245763SN/A 1253116SN/A assembler.symbols["lssz"] = \ 12611263Sandreas.sandberg@arm.com "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)" 1274597SN/A 1284597SN/A # Short hand for common scale-index-base combinations. 1294283SN/A assembler.symbols["sib"] = \ 1304283SN/A [symbols["scale"], symbols["index"], symbols["base"]] 1314486SN/A assembler.symbols["riprel"] = \ 1324486SN/A ["1", assembler.symbols["t0"], assembler.symbols["t7"]] 1334486SN/A 1344486SN/A # This segment selects an internal address space mapped to MSRs, 1353116SN/A # CPUID info, etc. 1363116SN/A assembler.symbols["intseg"] = "SEGMENT_REG_MS" 1373116SN/A # This segment always has base 0, and doesn't imply any special handling 1383116SN/A # like the internal segment above 1393116SN/A assembler.symbols["flatseg"] = "SEGMENT_REG_LS" 1403116SN/A 1413116SN/A for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di', \ 1423116SN/A '8', '9', '10', '11', '12', '13', '14', '15'): 1433116SN/A assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() 1443116SN/A 1453116SN/A for reg in range(16): 1463116SN/A assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg 1473116SN/A 1483116SN/A for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \ 1493116SN/A 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'): 1503116SN/A assembler.symbols[flag] = flag + "Bit" 1513116SN/A 1523116SN/A for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF', 1535535SN/A 'MSTRZ', 'STRZ', 'MSTRC', 1545535SN/A 'OF', 'CF', 'ZF', 'CvZF', 1555535SN/A 'SF', 'PF', 'SxOF', 'SxOvZF'): 1565535SN/A assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond 1575535SN/A assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond 1585535SN/A assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF" 1595781SN/A assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF" 1605781SN/A 1613116SN/A assembler.symbols["CTrue"] = "ConditionTests::True" 1625763SN/A assembler.symbols["CFalse"] = "ConditionTests::False" 1635763SN/A 1645763SN/A for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip', 1655763SN/A 'star', 'lstar', 'cstar', 'sf_mask', 1665781SN/A 'kernel_gs_base'): 1675781SN/A assembler.symbols[reg] = "MISCREG_%s" % reg.upper() 1685763SN/A 1695763SN/A # Code literal which forces a default 64 bit operand size in 64 bit mode. 1705763SN/A assembler.symbols["oszIn64Override"] = ''' 1715763SN/A if (machInst.mode.submode == SixtyFourBitMode && 1725763SN/A env.dataSize == 4) 1735781SN/A env.dataSize = 8; 1745781SN/A ''' 1755763SN/A 1764981SN/A assembler.symbols["maxOsz"] = ''' 1774597SN/A if (machInst.mode.submode == SixtyFourBitMode) 1784597SN/A env.dataSize = 8; 17911263Sandreas.sandberg@arm.com else 1809339SN/A env.dataSize = 4; 1811310SN/A ''' 1821310SN/A 1831310SN/A def trimImm(width): 1841634SN/A return "adjustedImm = adjustedImm & mask(%s);" % width 1851634SN/A 1861634SN/A assembler.symbols["trimImm"] = trimImm 1871634SN/A 1881647SN/A def labeler(labelStr): 1891925SN/A return "label_%s" % labelStr 1901925SN/A 1911925SN/A assembler.symbols["label"] = labeler 1921925SN/A 1931310SN/A def rom_labeler(labelStr): 1941369SN/A return "romMicroPC(RomLabels::extern_label_%s)" % labelStr 1952008SN/A 1962008SN/A assembler.symbols["rom_label"] = rom_labeler 1972008SN/A 1982210SN/A def rom_local_labeler(labelStr): 1991310SN/A return "romMicroPC(RomLabels::label_%s)" % labelStr 2004982SN/A 2014982SN/A assembler.symbols["rom_local_label"] = rom_local_labeler 20211263Sandreas.sandberg@arm.com 2034982SN/A def stack_index(index): 2044982SN/A return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index 2054982SN/A 2064982SN/A assembler.symbols["st"] = stack_index 2074982SN/A 2082916SN/A macroopDict = assembler.assemble(microcode) 2092916SN/A 2102916SN/A decoder_output += mainRom.getDefinition() 2112916SN/A header_output += mainRom.getDeclaration() 2122916SN/A}}; 2132916SN/A