microasm.isa revision 5426
14309Sgblack@eecs.umich.edu// -*- mode:c++ -*- 24309Sgblack@eecs.umich.edu 35426Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 44309Sgblack@eecs.umich.edu// All rights reserved. 54309Sgblack@eecs.umich.edu// 64309Sgblack@eecs.umich.edu// Redistribution and use of this software in source and binary forms, 74309Sgblack@eecs.umich.edu// with or without modification, are permitted provided that the 84309Sgblack@eecs.umich.edu// following conditions are met: 94309Sgblack@eecs.umich.edu// 104309Sgblack@eecs.umich.edu// The software must be used only for Non-Commercial Use which means any 114309Sgblack@eecs.umich.edu// use which is NOT directed to receiving any direct monetary 124309Sgblack@eecs.umich.edu// compensation for, or commercial advantage from such use. Illustrative 134309Sgblack@eecs.umich.edu// examples of non-commercial use are academic research, personal study, 144309Sgblack@eecs.umich.edu// teaching, education and corporate research & development. 154309Sgblack@eecs.umich.edu// Illustrative examples of commercial use are distributing products for 164309Sgblack@eecs.umich.edu// commercial advantage and providing services using the software for 174309Sgblack@eecs.umich.edu// commercial advantage. 184309Sgblack@eecs.umich.edu// 194309Sgblack@eecs.umich.edu// If you wish to use this software or functionality therein that may be 204309Sgblack@eecs.umich.edu// covered by patents for commercial use, please contact: 214309Sgblack@eecs.umich.edu// Director of Intellectual Property Licensing 224309Sgblack@eecs.umich.edu// Office of Strategy and Technology 234309Sgblack@eecs.umich.edu// Hewlett-Packard Company 244309Sgblack@eecs.umich.edu// 1501 Page Mill Road 254309Sgblack@eecs.umich.edu// Palo Alto, California 94304 264309Sgblack@eecs.umich.edu// 274309Sgblack@eecs.umich.edu// Redistributions of source code must retain the above copyright notice, 284309Sgblack@eecs.umich.edu// this list of conditions and the following disclaimer. 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Derivatives of the software may be shared with 384309Sgblack@eecs.umich.edu// others provided: (i) the others agree to abide by the list of 394309Sgblack@eecs.umich.edu// conditions herein which includes the Non-Commercial Use restrictions; 404309Sgblack@eecs.umich.edu// and (ii) such Derivatives of the software include the above copyright 414309Sgblack@eecs.umich.edu// notice to acknowledge the contribution from this software where 424309Sgblack@eecs.umich.edu// applicable, this list of conditions and the disclaimer below. 434309Sgblack@eecs.umich.edu// 444309Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 454309Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 464309Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 474309Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 484309Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 494309Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 504309Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 514309Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 524309Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 534309Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 544309Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 554309Sgblack@eecs.umich.edu// 564309Sgblack@eecs.umich.edu// Authors: Gabe Black 574309Sgblack@eecs.umich.edu 584533Sgblack@eecs.umich.edu//Include the definitions of the micro ops. 594679Sgblack@eecs.umich.edu//These are python representations of static insts which stand on their own 604679Sgblack@eecs.umich.edu//and make up an internal instruction set. They are used by the micro 614679Sgblack@eecs.umich.edu//assembler. 624533Sgblack@eecs.umich.edu##include "microops/microops.isa" 634533Sgblack@eecs.umich.edu 644537Sgblack@eecs.umich.edu//Include code to build macroops in both C++ and python. 654533Sgblack@eecs.umich.edu##include "macroop.isa" 664528Sgblack@eecs.umich.edu 674528Sgblack@eecs.umich.edulet {{ 684528Sgblack@eecs.umich.edu import sys 694528Sgblack@eecs.umich.edu sys.path[0:0] = ["src/arch/x86/isa/"] 704528Sgblack@eecs.umich.edu from insts import microcode 714605Sgblack@eecs.umich.edu # print microcode 724528Sgblack@eecs.umich.edu from micro_asm import MicroAssembler, Rom_Macroop, Rom 734528Sgblack@eecs.umich.edu mainRom = Rom('main ROM') 744528Sgblack@eecs.umich.edu assembler = MicroAssembler(X86Macroop, microopClasses, mainRom, Rom_Macroop) 754615Sgblack@eecs.umich.edu # Add in symbols for the microcode registers 764615Sgblack@eecs.umich.edu for num in range(15): 774615Sgblack@eecs.umich.edu assembler.symbols["t%d" % num] = "NUM_INTREGS+%d" % num 785045Sgblack@eecs.umich.edu for num in range(7): 795045Sgblack@eecs.umich.edu assembler.symbols["ufp%d" % num] = "FLOATREG_MICROFP(%d)" % num 804615Sgblack@eecs.umich.edu # Add in symbols for the segment descriptor registers 814615Sgblack@eecs.umich.edu for letter in ("C", "D", "E", "F", "G", "S"): 824615Sgblack@eecs.umich.edu assembler.symbols["%ss" % letter.lower()] = "SEGMENT_REG_%sS" % letter 835291Sgblack@eecs.umich.edu 845294Sgblack@eecs.umich.edu for reg in ("TR", "IDTR"): 855291Sgblack@eecs.umich.edu assembler.symbols[reg.lower()] = "SYS_SEGMENT_REG_%s" % reg 865291Sgblack@eecs.umich.edu 875294Sgblack@eecs.umich.edu for reg in ("TSL", "TSG"): 885294Sgblack@eecs.umich.edu assembler.symbols[reg.lower()] = "SEGMENT_REG_%s" % reg 895294Sgblack@eecs.umich.edu 904615Sgblack@eecs.umich.edu # Miscellaneous symbols 914615Sgblack@eecs.umich.edu symbols = { 924615Sgblack@eecs.umich.edu "reg" : "env.reg", 935029Sgblack@eecs.umich.edu "xmml" : "FLOATREG_XMM_LOW(env.reg)", 945029Sgblack@eecs.umich.edu "xmmh" : "FLOATREG_XMM_HIGH(env.reg)", 954615Sgblack@eecs.umich.edu "regm" : "env.regm", 965029Sgblack@eecs.umich.edu "xmmlm" : "FLOATREG_XMM_LOW(env.regm)", 975029Sgblack@eecs.umich.edu "xmmhm" : "FLOATREG_XMM_HIGH(env.regm)", 985161Sgblack@eecs.umich.edu "imm" : "adjustedImm", 995161Sgblack@eecs.umich.edu "disp" : "adjustedDisp", 1004863Sgblack@eecs.umich.edu "seg" : "env.seg", 1014615Sgblack@eecs.umich.edu "scale" : "env.scale", 1024615Sgblack@eecs.umich.edu "index" : "env.index", 1034615Sgblack@eecs.umich.edu "base" : "env.base", 1044615Sgblack@eecs.umich.edu "dsz" : "env.dataSize", 1054953Sgblack@eecs.umich.edu "asz" : "env.addressSize", 1064615Sgblack@eecs.umich.edu "ssz" : "env.stackSize" 1074615Sgblack@eecs.umich.edu } 1084863Sgblack@eecs.umich.edu assembler.symbols.update(symbols) 1094863Sgblack@eecs.umich.edu 1105326Sgblack@eecs.umich.edu assembler.symbols["ldsz"] = \ 1115326Sgblack@eecs.umich.edu "((env.dataSize == 8) ? 3 : (env.dataSize == 4) ? 2 : 1)" 1125326Sgblack@eecs.umich.edu 1135326Sgblack@eecs.umich.edu assembler.symbols["lasz"] = \ 1145326Sgblack@eecs.umich.edu "((env.addressSize == 8) ? 3 : (env.addressSize == 4) ? 2 : 1)" 1155326Sgblack@eecs.umich.edu 1165326Sgblack@eecs.umich.edu assembler.symbols["lssz"] = \ 1175326Sgblack@eecs.umich.edu "((env.stackSize == 8) ? 3 : (env.stackSize == 4) ? 2 : 1)" 1185326Sgblack@eecs.umich.edu 1194863Sgblack@eecs.umich.edu # Short hand for common scale-index-base combinations. 1204863Sgblack@eecs.umich.edu assembler.symbols["sib"] = \ 1214863Sgblack@eecs.umich.edu [symbols["scale"], symbols["index"], symbols["base"]] 1224863Sgblack@eecs.umich.edu assembler.symbols["riprel"] = \ 1234863Sgblack@eecs.umich.edu ["1", assembler.symbols["t0"], assembler.symbols["t7"]] 1244620Sgblack@eecs.umich.edu 1255149Sgblack@eecs.umich.edu # This segment selects an internal address space mapped to MSRs, 1265149Sgblack@eecs.umich.edu # CPUID info, etc. 1275294Sgblack@eecs.umich.edu assembler.symbols["intseg"] = "SEGMENT_REG_MS" 1285294Sgblack@eecs.umich.edu # This segment always has base 0, and doesn't imply any special handling 1295294Sgblack@eecs.umich.edu # like the internal segment above 1305294Sgblack@eecs.umich.edu assembler.symbols["flatseg"] = "SEGMENT_REG_LS" 1315149Sgblack@eecs.umich.edu 1324620Sgblack@eecs.umich.edu for reg in ('ax', 'bx', 'cx', 'dx', 'sp', 'bp', 'si', 'di'): 1334620Sgblack@eecs.umich.edu assembler.symbols["r%s" % reg] = "INTREG_R%s" % reg.upper() 1344615Sgblack@eecs.umich.edu 1355241Sgblack@eecs.umich.edu for reg in range(15): 1365241Sgblack@eecs.umich.edu assembler.symbols["cr%d" % reg] = "MISCREG_CR%d" % reg 1375241Sgblack@eecs.umich.edu 1385426Sgblack@eecs.umich.edu for flag in ('CF', 'PF', 'ECF', 'AF', 'EZF', 'ZF', 'SF', 'OF', \ 1395426Sgblack@eecs.umich.edu 'TF', 'IF', 'NT', 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID'): 1404686Sgblack@eecs.umich.edu assembler.symbols[flag] = flag + "Bit" 1414686Sgblack@eecs.umich.edu 1424686Sgblack@eecs.umich.edu for cond in ('True', 'False', 'ECF', 'EZF', 'SZnZF', 1434953Sgblack@eecs.umich.edu 'MSTRZ', 'STRZ', 'MSTRC', 1444686Sgblack@eecs.umich.edu 'OF', 'CF', 'ZF', 'CvZF', 1454686Sgblack@eecs.umich.edu 'SF', 'PF', 'SxOF', 'SxOvZF'): 1464686Sgblack@eecs.umich.edu assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond 1474686Sgblack@eecs.umich.edu assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond 1484953Sgblack@eecs.umich.edu assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF" 1494953Sgblack@eecs.umich.edu assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF" 1504686Sgblack@eecs.umich.edu 1514686Sgblack@eecs.umich.edu assembler.symbols["CTrue"] = "ConditionTests::True" 1524686Sgblack@eecs.umich.edu assembler.symbols["CFalse"] = "ConditionTests::False" 1534686Sgblack@eecs.umich.edu 1544615Sgblack@eecs.umich.edu # Code literal which forces a default 64 bit operand size in 64 bit mode. 1554615Sgblack@eecs.umich.edu assembler.symbols["oszIn64Override"] = ''' 1564615Sgblack@eecs.umich.edu if (machInst.mode.submode == SixtyFourBitMode && 1574615Sgblack@eecs.umich.edu env.dataSize == 4) 1584615Sgblack@eecs.umich.edu env.dataSize = 8; 1594615Sgblack@eecs.umich.edu ''' 1604615Sgblack@eecs.umich.edu 1615291Sgblack@eecs.umich.edu assembler.symbols["oszForPseudoDesc"] = ''' 1625291Sgblack@eecs.umich.edu if (machInst.mode.submode == SixtyFourBitMode) 1635291Sgblack@eecs.umich.edu env.dataSize = 8; 1645291Sgblack@eecs.umich.edu else 1655291Sgblack@eecs.umich.edu env.dataSize = 4; 1665291Sgblack@eecs.umich.edu ''' 1675291Sgblack@eecs.umich.edu 1685161Sgblack@eecs.umich.edu def trimImm(width): 1695161Sgblack@eecs.umich.edu return "adjustedImm = adjustedImm & mask(%s);" % width 1705161Sgblack@eecs.umich.edu 1715161Sgblack@eecs.umich.edu assembler.symbols["trimImm"] = trimImm 1725161Sgblack@eecs.umich.edu 1735008Sgblack@eecs.umich.edu def labeler(labelStr): 1745008Sgblack@eecs.umich.edu return "label_%s" % labelStr 1755008Sgblack@eecs.umich.edu 1765008Sgblack@eecs.umich.edu assembler.symbols["label"] = labeler 1775008Sgblack@eecs.umich.edu 1785082Sgblack@eecs.umich.edu def stack_index(index): 1795121Sgblack@eecs.umich.edu return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index 1805082Sgblack@eecs.umich.edu 1815082Sgblack@eecs.umich.edu assembler.symbols["st"] = stack_index 1825082Sgblack@eecs.umich.edu 1834528Sgblack@eecs.umich.edu macroopDict = assembler.assemble(microcode) 1844528Sgblack@eecs.umich.edu}}; 185