xref: /gem5/src/arch/x86/isa/insts/system/msrs.py

# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
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# Authors: Gabe Black

microcode = '''
def macroop RDMSR
{
    ld t2, intseg, [8, rcx, t0], "IntAddrPrefixMSR << 3", \
        dataSize=8, addressSize=8
    mov rax, rax, t2, dataSize=4
    srli t2, t2, 32, dataSize=8
    mov rdx, rdx, t2, dataSize=4
};

def macroop WRMSR
{
    .serialize_after
    mov t2, t2, rax, dataSize=4
    slli t3, rdx, 32, dataSize=8
    or t2, t2, t3, dataSize=8
    st t2, intseg, [8, rcx, t0], "IntAddrPrefixMSR << 3", \
        dataSize=8, addressSize=8
};

def macroop RDTSC
{
    .serialize_before
    rdtsc t1
    mov rax, rax, t1, dataSize=4
    srli t1, t1, 32, dataSize=8
    mov rdx, rdx, t1, dataSize=4
};
'''