xref: /gem5/src/arch/x86/isa/insts/general_purpose/system_calls.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
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# teaching, education and corporate research & development.
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# commercial advantage.
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# If you wish to use this software or functionality therein that may be
# covered by patents for commercial use, please contact:
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# this list of conditions and the following disclaimer.  Redistributions
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# Authors: Gabe Black

microcode = '''
def macroop SYSCALL_64
{
    # All 1s.
    limm t1, "(uint64_t)(-1)", dataSize=8

    # Save the next RIP.
    rdip rcx

    # Stick rflags with RF masked into r11.
    rflags t2
    limm t3, "~RFBit", dataSize=8
    and r11, t2, t3, dataSize=8

    rdval t3, star
    srli t3, t3, 32, dataSize=8
    andi t3, t3, 0xFC, dataSize=1

    # Set up CS.
    wrsel cs, t3
    wrbase cs, t0, dataSize=8
    wrlimit cs, t1, dataSize=4
    # Not writable, read/execute-able, not expandDown,
    # dpl=0, defaultSize=0, long mode
    limm t4, ((0 << 0)  | (0  << 2)  | (0 << 3)   | \
              (1 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (10 << 8)  | (0 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr cs, t4

    # Set up SS.
    addi t3, t3, 8
    wrsel ss, t3
    wrbase ss, t0, dataSize=8
    wrlimit ss, t1, dataSize=4
    # Writable, readable, not expandDown,
    # dpl=0, defaultSize=0, not long mode
    limm t4, ((0 << 0)  | (0  << 2)  | (1 << 3)   | \
              (0 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (2  << 8)  | (1 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr ss, t4

    # Set the new rip.
    rdval t7, lstar
    wrip t0, t7

    # Mask the flags against sf_mask and leave RF turned off.
    rdval t3, sf_mask, dataSize=8
    xor t3, t3, t1, dataSize=8
    and t3, t3, r11, dataSize=8
    wrflags t3, t0
};

def macroop SYSCALL_COMPAT
{
    # All 1s.
    limm t1, "(uint64_t)(-1)", dataSize=8

    # Save the next RIP.
    rdip rcx

    # Stick rflags with RF masked into r11.
    rflags t2
    limm t3, "~RFBit", dataSize=8
    and r11, t2, t3, dataSize=8

    rdval t3, star
    srli t3, t3, 32, dataSize=8
    andi t3, t3, 0xFC, dataSize=1

    # Set up CS.
    wrsel cs, t3
    wrbase cs, t0, dataSize=8
    wrlimit cs, t1, dataSize=4
    # Not writable, read/execute-able, not expandDown,
    # dpl=0, defaultSize=0, long mode
    limm t4, ((0 << 0)  | (0  << 2)  | (0 << 3)   | \
              (1 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (10 << 8)  | (0 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr cs, t4

    # Set up SS.
    addi t3, t3, 8
    wrsel ss, t3
    wrbase ss, t0, dataSize=8
    wrlimit ss, t1, dataSize=4
    # Writable, readable, not expandDown,
    # dpl=0, defaultSize=0, not long mode
    limm t4, ((0 << 0)  | (0  << 2)  | (1 << 3)   | \
              (0 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (2  << 8)  | (1 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr ss, t4

    # Set the new rip.
    rdval t7, cstar
    wrip t0, t7

    # Mask the flags against sf_mask and leave RF turned off.
    rdval t3, sf_mask, dataSize=8
    xor t3, t3, t1, dataSize=8
    and t3, t3, r11, dataSize=8
    wrflags t3, t0
};

def macroop SYSCALL_LEGACY
{
    panic "The syscall instruction isn't implemented in legacy mode."
};

def macroop SYSRET_TO_64
{
    # All 1s.
    limm t1, "(uint64_t)(-1)", dataSize=8

    rdval t3, star
    srli t3, t3, 48, dataSize=8
    ori t3, t3, 3, dataSize=1

    # Set rflags to r11 with RF and VM cleared.
    limm t4, "~(RFBit | VMBit)", dataSize=8
    and t4, t4, r11, dataSize=8
    wrflags t4, t0

    # Set up CS.
    addi t4, t3, 16, dataSize=8
    wrsel cs, t4
    wrbase cs, t0, dataSize=8
    wrlimit cs, t1, dataSize=4
    # Not writable, read/execute-able, not expandDown,
    # dpl=3, defaultSize=0, long mode
    limm t4, ((3 << 0)  | (0  << 2)  | (0 << 3)   | \
              (1 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (10 << 8)  | (0 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr cs, t4

    # Only the selector is changed for SS.
    addi t4, t3, 8, dataSize=8
    wrsel ss, t4

    # Set the RIP back.
    wrip rcx, t0, dataSize=8
};

def macroop SYSRET_TO_COMPAT
{
    # All 1s.
    limm t1, "(uint64_t)(-1)", dataSize=8

    rdval t3, star
    srli t3, t3, 48, dataSize=8
    ori t3, t3, 3, dataSize=1

    # Set rflags to r11 with RF and VM cleared.
    limm t4, "~(RFBit | VMBit)", dataSize=8
    and t4, t4, r11, dataSize=8
    wrflags t4, t0

    # Set up CS.
    wrsel cs, t3
    wrbase cs, t0, dataSize=8
    wrlimit cs, t1, dataSize=4
    # Not writable, read/execute-able, not expandDown,
    # dpl=3, defaultSize=1, not long mode
    limm t4, ((3 << 0)  | (0  << 2)  | (0 << 3)   | \
              (1 << 4)  | (0  << 5)  | (1 << 6)   | \
              (1 << 7)  | (10 << 8)  | (0 << 12)  | \
              (1 << 13) | (0  << 14) | (1 << 15)), dataSize=8
    wrattr cs, t4

    # Only the selector is changed for SS.
    addi t4, t3, 8, dataSize=8
    wrsel ss, t4

    # Set the RIP back.
    wrip rcx, t0, dataSize=8
};

def macroop SYSRET_NON_64
{
    panic "The sysret instruction isn't implemented in legacy mode."
};
'''
#let {{
#    class SYSENTER(Inst):
#       "GenFault ${new UnimpInstFault}"
#    class SYSEXIT(Inst):
#       "GenFault ${new UnimpInstFault}"
#}};