semaphores.py revision 7087:fb8d5786ff30 
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabe Black
37
38microcode = '''
39def macroop CMPXCHG_R_R {
40    sub t0, rax, reg, flags=(OF, SF, ZF, AF, PF, CF)
41    mov reg, reg, regm, flags=(CZF,)
42    mov rax, rax, reg, flags=(nCZF,)
43};
44
45def macroop CMPXCHG_M_R {
46    ldst t1, seg, sib, disp
47    sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
48
49    mov t1, t1, reg, flags=(CZF,)
50    st t1, seg, sib, disp
51    mov rax, rax, t1, flags=(nCZF,)
52};
53
54def macroop CMPXCHG_P_R {
55    rdip t7
56    ldst t1, seg, riprel, disp
57    sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
58
59    mov t1, t1, reg, flags=(CZF,)
60    st t1, seg, riprel, disp
61    mov rax, rax, t1, flags=(nCZF,)
62};
63
64def macroop CMPXCHG_LOCKED_M_R {
65    ldstl t1, seg, sib, disp
66    sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
67
68    mov t1, t1, reg, flags=(CZF,)
69    stul t1, seg, sib, disp
70    mov rax, rax, t1, flags=(nCZF,)
71};
72
73def macroop CMPXCHG_LOCKED_P_R {
74    rdip t7
75    ldstl t1, seg, riprel, disp
76    sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
77
78    mov t1, t1, reg, flags=(CZF,)
79    stul t1, seg, riprel, disp
80    mov rax, rax, t1, flags=(nCZF,)
81};
82
83def macroop XADD_M_R {
84    ldst t1, seg, sib, disp
85    add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
86    st t2, seg, sib, disp
87    mov reg, reg, t1
88};
89
90def macroop XADD_P_R {
91    rdip t7
92    ldst t1, seg, riprel, disp
93    add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
94    st t2, seg, riprel, disp
95    mov reg, reg, t1
96};
97
98def macroop XADD_LOCKED_M_R {
99    ldstl t1, seg, sib, disp
100    add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
101    stul t2, seg, sib, disp
102    mov reg, reg, t1
103};
104
105def macroop XADD_LOCKED_P_R {
106    rdip t7
107    ldstl t1, seg, riprel, disp
108    add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
109    stul t2, seg, riprel, disp
110    mov reg, reg, t1
111};
112
113def macroop XADD_R_R {
114    add t2, regm, reg, flags=(OF,SF,ZF,AF,PF,CF)
115    mov regm, regm, reg
116    mov reg, reg, t2
117};
118
119'''
120
121cmpxchg8bCode = '''
122def macroop CMPXCHG8B_%(suffix)s {
123    %(rdip)s
124    lea t1, seg, %(sib)s, disp, dataSize=asz
125    ldst%(l)s t2, seg, [1, t0, t1], 0
126    ldst%(l)s t3, seg, [1, t0, t1], dsz
127
128    sub t0, rax, t2, flags=(ZF,)
129    br label("doneComparing"), flags=(nCZF,)
130    sub t0, rdx, t3, flags=(ZF,)
131doneComparing:
132
133    # If they're equal, set t3:t2 to rbx:rcx to write to memory
134    mov t2, t2, rbx, flags=(CZF,)
135    mov t3, t3, rcx, flags=(CZF,)
136
137    # If they're not equal, set rdx:rax to the value from memory.
138    mov rax, rax, t2, flags=(nCZF,)
139    mov rdx, rdx, t3, flags=(nCZF,)
140
141    # Write to memory
142    st%(ul)s t3, seg, [1, t0, t1], dsz
143    st%(ul)s t2, seg, [1, t0, t1], 0
144};
145'''
146
147microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
148                              "l": "", "ul": "",
149                              "suffix": "M"}
150microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
151                              "l": "", "ul": "",
152                              "suffix": "P"}
153microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
154                              "l": "l", "ul": "ul",
155                              "suffix": "LOCKED_M"}
156microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
157                              "l": "l", "ul": "ul",
158                              "suffix": "LOCKED_P"}
159
160#let {{
161#    class XCHG(Inst):
162#       "GenFault ${new UnimpInstFault}"
163#}};
164