xref: /gem5/src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
# All rights reserved.
#
# Redistribution and use of this software in source and binary forms,
# with or without modification, are permitted provided that the
# following conditions are met:
#
# The software must be used only for Non-Commercial Use which means any
# use which is NOT directed to receiving any direct monetary
# compensation for, or commercial advantage from such use.  Illustrative
# examples of non-commercial use are academic research, personal study,
# teaching, education and corporate research & development.
# Illustrative examples of commercial use are distributing products for
# commercial advantage and providing services using the software for
# commercial advantage.
#
# If you wish to use this software or functionality therein that may be
# covered by patents for commercial use, please contact:
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#
# Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.  Redistributions
# in binary form must reproduce the above copyright notice, this list of
# conditions and the following disclaimer in the documentation and/or
# other materials provided with the distribution.  Neither the name of
# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.  No right of
# sublicense is granted herewith.  Derivatives of the software and
# output created using the software may be prepared, but only for
# Non-Commercial Uses.  Derivatives of the software may be shared with
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# conditions herein which includes the Non-Commercial Use restrictions;
# and (ii) such Derivatives of the software include the above copyright
# notice to acknowledge the contribution from this software where
# applicable, this list of conditions and the disclaimer below.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# Authors: Gabe Black

microcode = '''
def macroop SAL_R_I
{
    slli reg, reg, imm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAL_M_I
{
    ldst t1, seg, sib, disp
    slli t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAL_P_I
{
    rdip t7
    ldst t1, seg, riprel, disp
    slli t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SAL_1_R
{
    slli reg, reg, 1, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAL_1_M
{
    ldst t1, seg, sib, disp
    slli t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAL_1_P
{
    rdip t7
    ldst t1, seg, riprel, disp
    slli t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SAL_R_R
{
    sll reg, reg, regm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAL_M_R
{
    ldst t1, seg, sib, disp
    sll t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAL_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    sll t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SHR_R_I
{
    srli reg, reg, imm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SHR_M_I
{
    ldst t1, seg, sib, disp
    srli t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SHR_P_I
{
    rdip t7
    ldst t1, seg, riprel, disp
    srli t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SHR_1_R
{
    srli reg, reg, 1, flags=(CF,OF,SF,ZF,PF)
};

def macroop SHR_1_M
{
    ldst t1, seg, sib, disp
    srli t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SHR_1_P
{
    rdip t7
    ldst t1, seg, riprel, disp
    srli t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SHR_R_R
{
    srl reg, reg, regm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SHR_M_R
{
    ldst t1, seg, sib, disp
    srl t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SHR_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    srl t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SAR_R_I
{
    srai reg, reg, imm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAR_M_I
{
    ldst t1, seg, sib, disp
    srai t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAR_P_I
{
    rdip t7
    ldst t1, seg, riprel, disp
    srai t1, t1, imm, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SAR_1_R
{
    srai reg, reg, 1, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAR_1_M
{
    ldst t1, seg, sib, disp
    srai t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAR_1_P
{
    rdip t7
    ldst t1, seg, riprel, disp
    srai t1, t1, 1, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};

def macroop SAR_R_R
{
    sra reg, reg, regm, flags=(CF,OF,SF,ZF,PF)
};

def macroop SAR_M_R
{
    ldst t1, seg, sib, disp
    sra t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, sib, disp
};

def macroop SAR_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    sra t1, t1, reg, flags=(CF,OF,SF,ZF,PF)
    st t1, seg, riprel, disp
};
'''