xref: /gem5/src/arch/x86/isa/insts/general_purpose/logical.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
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#
# Redistribution and use of this software in source and binary forms,
# with or without modification, are permitted provided that the
# following conditions are met:
#
# The software must be used only for Non-Commercial Use which means any
# use which is NOT directed to receiving any direct monetary
# compensation for, or commercial advantage from such use.  Illustrative
# examples of non-commercial use are academic research, personal study,
# teaching, education and corporate research & development.
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# commercial advantage.
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# If you wish to use this software or functionality therein that may be
# covered by patents for commercial use, please contact:
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#
# Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.  Redistributions
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# notice to acknowledge the contribution from this software where
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# Authors: Gabe Black

microcode = '''
def macroop OR_R_R
{
    or reg, reg, regm, flags=(OF,SF,ZF,PF,CF)
};

def macroop OR_M_I
{
    limm t2, imm
    ldst t1, seg, sib, disp
    or t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, sib, disp
};

def macroop OR_P_I
{
    limm t2, imm
    rdip t7
    ldst t1, seg, riprel, disp
    or t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, riprel, disp
};

def macroop OR_LOCKED_M_I
{
    limm t2, imm
    ldstl t1, seg, sib, disp
    or t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    stul t1, seg, sib, disp
};

def macroop OR_LOCKED_P_I
{
    limm t2, imm
    rdip t7
    ldstl t1, seg, riprel, disp
    or t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    stul t1, seg, riprel, disp
};

def macroop OR_M_R
{
    ldst t1, seg, sib, disp
    or t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, sib, disp
};

def macroop OR_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    or t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, riprel, disp
};

def macroop OR_LOCKED_M_R
{
    ldstl t1, seg, sib, disp
    or t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    stul t1, seg, sib, disp
};

def macroop OR_LOCKED_P_R
{
    rdip t7
    ldstl t1, seg, riprel, disp
    or t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    stul t1, seg, riprel, disp
};

def macroop OR_R_M
{
    ld t1, seg, sib, disp
    or reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop OR_R_P
{
    rdip t7
    ld t1, seg, riprel, disp
    or reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop OR_R_I
{
    limm t1, imm
    or reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop XOR_R_R
{
    xor reg, reg, regm, flags=(OF,SF,ZF,PF,CF)
};

def macroop XOR_R_I
{
    limm t1, imm
    xor reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop XOR_M_I
{
    limm t2, imm
    ldst t1, seg, sib, disp
    xor t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, sib, disp
};

def macroop XOR_P_I
{
    limm t2, imm
    rdip t7
    ldst t1, seg, riprel, disp
    xor t1, t1, t2, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, riprel, disp
};

def macroop XOR_M_R
{
    ldst t1, seg, sib, disp
    xor t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, sib, disp
};

def macroop XOR_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    xor t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, riprel, disp
};

def macroop XOR_R_M
{
    ld t1, seg, sib, disp
    xor reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop XOR_R_P
{
    rdip t7
    ld t1, seg, riprel, disp
    xor reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop AND_R_R
{
    and reg, reg, regm, flags=(OF,SF,ZF,PF,CF)
};

def macroop AND_R_M
{
    ld t1, seg, sib, disp
    and reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop AND_R_P
{
    rdip t7
    ld t1, seg, riprel, disp
    and reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop AND_R_I
{
    limm t1, imm
    and reg, reg, t1, flags=(OF,SF,ZF,PF,CF)
};

def macroop AND_M_I
{
    ldst t2, seg, sib, disp
    limm t1, imm
    and t2, t2, t1, flags=(OF,SF,ZF,PF,CF)
    st t2, seg, sib, disp
};

def macroop AND_P_I
{
    rdip t7
    ldst t2, seg, riprel, disp
    limm t1, imm
    and t2, t2, t1, flags=(OF,SF,ZF,PF,CF)
    st t2, seg, riprel, disp
};

def macroop AND_M_R
{
    ldst t1, seg, sib, disp
    and t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, sib, disp
};

def macroop AND_P_R
{
    rdip t7
    ldst t1, seg, riprel, disp
    and t1, t1, reg, flags=(OF,SF,ZF,PF,CF)
    st t1, seg, riprel, disp
};

def macroop NOT_R
{
    limm t1, -1
    xor reg, reg, t1
};

def macroop NOT_M
{
    limm t1, -1
    ldst t2, seg, sib, disp
    xor t2, t2, t1
    st t2, seg, sib, disp
};

def macroop NOT_P
{
    limm t1, -1
    rdip t7
    ldst t2, seg, riprel, disp
    xor t2, t2, t1
    st t2, seg, riprel, disp
};
'''