general_purpose/data_transfer/move.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
# All rights reserved.
#
# Redistribution and use of this software in source and binary forms,
# with or without modification, are permitted provided that the
# following conditions are met:
#
# The software must be used only for Non-Commercial Use which means any
# use which is NOT directed to receiving any direct monetary
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# commercial advantage and providing services using the software for
# commercial advantage.
#
# If you wish to use this software or functionality therein that may be
# covered by patents for commercial use, please contact:
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#
# Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.  Redistributions
# in binary form must reproduce the above copyright notice, this list of
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# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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# this software without specific prior written permission.  No right of
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#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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#
# Authors: Gabe Black

microcode = '''

#
# Regular moves
#

def macroop MOV_R_MI {
    limm t1, imm
    ld reg, seg, [1, t0, t1]
};

def macroop MOV_MI_R {
    limm t1, imm
    st reg, seg, [1, t0, t1]
};

def macroop MOV_R_R {
    mov reg, reg, regm
};

def macroop MOV_M_R {
    st reg, seg, sib, disp
};

def macroop MOV_P_R {
    rdip t7
    st reg, seg, riprel, disp
};

def macroop MOV_R_M {
    ld reg, seg, sib, disp
};

def macroop MOV_R_P {
    rdip t7
    ld reg, seg, riprel, disp
};

def macroop MOV_R_I {
    limm reg, imm
};

def macroop MOV_M_I {
    limm t1, imm
    st t1, seg, sib, disp
};

def macroop MOV_P_I {
    rdip t7
    limm t1, imm
    st t1, seg, riprel, disp
};

#
# Sign extending moves
#

def macroop MOVSXD_R_R {
    sexti reg, regm, 31
};

def macroop MOVSXD_R_M {
    ld t1, seg, sib, disp, dataSize=4
    sexti reg, t1, 31
};

def macroop MOVSXD_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=4
    sexti reg, t1, 31
};

def macroop MOVSX_B_R_R {
    sexti reg, regm, 7
};

def macroop MOVSX_B_R_M {
    ld reg, seg, sib, disp, dataSize=1
    sexti reg, reg, 7
};

def macroop MOVSX_B_R_P {
    rdip t7
    ld reg, seg, riprel, disp, dataSize=1
    sexti reg, reg, 7
};

def macroop MOVSX_W_R_R {
    sexti reg, regm, 15
};

def macroop MOVSX_W_R_M {
    ld reg, seg, sib, disp, dataSize=2
    sexti reg, reg, 15
};

def macroop MOVSX_W_R_P {
    rdip t7
    ld reg, seg, riprel, disp, dataSize=2
    sexti reg, reg, 15
};

#
# Zero extending moves
#

def macroop MOVZX_B_R_R {
    zexti reg, regm, 7
};

def macroop MOVZX_B_R_M {
    ld t1, seg, sib, disp, dataSize=1
    zexti reg, t1, 7
};

def macroop MOVZX_B_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=1
    zexti reg, t1, 7
};

def macroop MOVZX_W_R_R {
    zexti reg, regm, 15
};

def macroop MOVZX_W_R_M {
    ld t1, seg, sib, disp, dataSize=2
    zexti reg, t1, 15
};

def macroop MOVZX_W_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=2
    zexti reg, t1, 15
};

def macroop MOV_C_R {
    wrcr reg, regm
};

def macroop MOV_R_S {
    rdsel reg, regm
};

def macroop MOV_M_S {
    rdsel t1, reg
    st t1, seg, sib, disp, dataSize=2
};

def macroop MOV_P_S {
    rdip t7
    rdsel t1, reg
    st t1, seg, riprel, disp, dataSize=2
};

def macroop MOV_REAL_S_R {
    zext t2, regm, 15
    slli t3, t2, 2, dataSize=8
    wrsel reg, regm
    wrbase reg, t3
};

def macroop MOV_REAL_S_M {
    ld t1, seg, sib, disp, dataSize=2
    zext t2, t1, 15
    slli t3, t2, 2, dataSize=8
    wrsel reg, t1
    wrbase reg, t3
};

def macroop MOV_REAL_S_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=2
    zext t2, t1, 15
    slli t3, t2, 2, dataSize=8
    wrsel reg, t1
    wrbase reg, t3
};

def macroop MOV_S_R {
    chks t1, regm, flags=(EZF,), dataSize=8
    bri t0, label("end"), flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, regm
end:
    wrsel reg, regm
};

def macroop MOV_S_M {
    ld t1, seg, sib, disp, dataSize=2
    chks t2, t1, flags=(EZF,), dataSize=8
    bri t0, label("end"), flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, t1
end:
    wrsel reg, t1
};

def macroop MOV_S_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=2
    chks t2, t1, flags=(EZF,), dataSize=8
    bri t0, label("end"), flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, t1
end:
    wrsel reg, t1
};

def macroop MOVSS_S_R {
    chks t1, regm, flags=(EZF,), dataSize=8
    # This actually needs to use the selector as the error code, but it would
    # be hard to get that information into the instruction at the moment.
    fault "new GeneralProtection(0)", flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, regm
    wrsel reg, regm
};

def macroop MOVSS_S_M {
    ld t1, seg, sib, disp, dataSize=2
    chks t2, t1, flags=(EZF,), dataSize=8
    # This actually needs to use the selector as the error code, but it would
    # be hard to get that information into the instruction at the moment.
    fault "new GeneralProtection(0)", flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, t1
    wrsel reg, t1
};

def macroop MOVSS_S_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=2
    chks t2, t1, flags=(EZF,), dataSize=8
    # This actually needs to use the selector as the error code, but it would
    # be hard to get that information into the instruction at the moment.
    fault "new GeneralProtection(0)", flags=(CEZF,)
    ld t2, flatseg, [1, t0, t1], addressSize=8, dataSize=8
    wrdl reg, t2, t1
    wrsel reg, t1
};
'''
#let {{
#    class MOVD(Inst):
#	"GenFault ${new UnimpInstFault}"
#    class MOVNTI(Inst):
#	"GenFault ${new UnimpInstFault}"
#}};