general_purpose/data_transfer/move.py

# Copyright (c) 2007 The Hewlett-Packard Development Company
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#
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#
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#
# Redistributions of source code must retain the above copyright notice,
# this list of conditions and the following disclaimer.  Redistributions
# in binary form must reproduce the above copyright notice, this list of
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# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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#
# Authors: Gabe Black

microcode = '''

#
# Regular moves
#

def macroop MOV_R_MI {
    limm t1, imm
    ld reg, seg, [1, t0, t1]
};

def macroop MOV_MI_R {
    limm t1, imm
    st reg, seg, [1, t0, t1]
};

def macroop MOV_R_R {
    mov reg, reg, regm
};

def macroop MOV_M_R {
    st reg, seg, sib, disp
};

def macroop MOV_P_R {
    rdip t7
    st reg, seg, riprel, disp
};

def macroop MOV_R_M {
    ld reg, seg, sib, disp
};

def macroop MOV_R_P {
    rdip t7
    ld reg, seg, riprel, disp
};

def macroop MOV_R_I {
    limm reg, imm
};

def macroop MOV_M_I {
    limm t1, imm
    st t1, seg, sib, disp
};

def macroop MOV_P_I {
    rdip t7
    limm t1, imm
    st t1, seg, riprel, disp
};

#
# Sign extending moves
#

def macroop MOVSXD_R_R {
    sext reg, regm, 32
};

def macroop MOVSXD_R_M {
    ld t1, seg, sib, disp, dataSize=4
    sext reg, t1, 32
};

def macroop MOVSXD_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=4
    sext reg, t1, 32
};

def macroop MOVSX_B_R_R {
    sext reg, regm, 8
};

def macroop MOVSX_B_R_M {
    ld reg, seg, sib, disp, dataSize=1
    sext reg, reg, 8
};

def macroop MOVSX_B_R_P {
    rdip t7
    ld reg, seg, riprel, disp, dataSize=1
    sext reg, reg, 8
};

def macroop MOVSX_W_R_R {
    sext reg, regm, 16
};

def macroop MOVSX_W_R_M {
    ld reg, seg, sib, disp, dataSize=2
    sext reg, reg, 16
};

def macroop MOVSX_W_R_P {
    rdip t7
    ld reg, seg, riprel, disp, dataSize=2
    sext reg, reg, 16
};

#
# Zero extending moves
#

def macroop MOVZX_B_R_R {
    zext reg, regm, 8
};

def macroop MOVZX_B_R_M {
    ld t1, seg, sib, disp, dataSize=1
    zext reg, t1, 8
};

def macroop MOVZX_B_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=1
    zext reg, t1, 8
};

def macroop MOVZX_W_R_R {
    zext reg, regm, 16
};

def macroop MOVZX_W_R_M {
    ld t1, seg, sib, disp, dataSize=2
    zext reg, t1, 16
};

def macroop MOVZX_W_R_P {
    rdip t7
    ld t1, seg, riprel, disp, dataSize=2
    zext reg, t1, 16
};
'''
#let {{
#    class MOVD(Inst):
#	"GenFault ${new UnimpInstFault}"
#    class MOVNTI(Inst):
#	"GenFault ${new UnimpInstFault}"
#}};