multiply_and_divide.py revision 6463
15081Sgblack@eecs.umich.edu# Copyright (c) 2007 The Hewlett-Packard Development Company 25081Sgblack@eecs.umich.edu# All rights reserved. 35081Sgblack@eecs.umich.edu# 45081Sgblack@eecs.umich.edu# Redistribution and use of this software in source and binary forms, 55081Sgblack@eecs.umich.edu# with or without modification, are permitted provided that the 65081Sgblack@eecs.umich.edu# following conditions are met: 75081Sgblack@eecs.umich.edu# 85081Sgblack@eecs.umich.edu# The software must be used only for Non-Commercial Use which means any 95081Sgblack@eecs.umich.edu# use which is NOT directed to receiving any direct monetary 105081Sgblack@eecs.umich.edu# compensation for, or commercial advantage from such use. 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Redistributions 275081Sgblack@eecs.umich.edu# in binary form must reproduce the above copyright notice, this list of 285081Sgblack@eecs.umich.edu# conditions and the following disclaimer in the documentation and/or 295081Sgblack@eecs.umich.edu# other materials provided with the distribution. Neither the name of 305081Sgblack@eecs.umich.edu# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 315081Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from 325081Sgblack@eecs.umich.edu# this software without specific prior written permission. No right of 335081Sgblack@eecs.umich.edu# sublicense is granted herewith. Derivatives of the software and 345081Sgblack@eecs.umich.edu# output created using the software may be prepared, but only for 355081Sgblack@eecs.umich.edu# Non-Commercial Uses. Derivatives of the software may be shared with 365081Sgblack@eecs.umich.edu# others provided: (i) the others agree to abide by the list of 375081Sgblack@eecs.umich.edu# conditions herein which includes the Non-Commercial Use restrictions; 385081Sgblack@eecs.umich.edu# and (ii) such Derivatives of the software include the above copyright 395081Sgblack@eecs.umich.edu# notice to acknowledge the contribution from this software where 405081Sgblack@eecs.umich.edu# applicable, this list of conditions and the disclaimer below. 415081Sgblack@eecs.umich.edu# 425081Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 435081Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 445081Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 455081Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 465081Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 475081Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 485081Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 495081Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 505081Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 515081Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 525081Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 535081Sgblack@eecs.umich.edu# 545081Sgblack@eecs.umich.edu# Authors: Gabe Black 555081Sgblack@eecs.umich.edu 565081Sgblack@eecs.umich.edumicrocode = ''' 575081Sgblack@eecs.umich.edu 585081Sgblack@eecs.umich.edu# 595081Sgblack@eecs.umich.edu# Byte version of one operand unsigned multiply. 605081Sgblack@eecs.umich.edu# 615081Sgblack@eecs.umich.edu 625081Sgblack@eecs.umich.edudef macroop MUL_B_R 635081Sgblack@eecs.umich.edu{ 646463Sgblack@eecs.umich.edu mul1u rax, reg, flags=(OF,CF) 655081Sgblack@eecs.umich.edu mulel rax 666463Sgblack@eecs.umich.edu muleh ah 675081Sgblack@eecs.umich.edu}; 685081Sgblack@eecs.umich.edu 695081Sgblack@eecs.umich.edudef macroop MUL_B_M 705081Sgblack@eecs.umich.edu{ 715081Sgblack@eecs.umich.edu ld t1, seg, sib, disp 726463Sgblack@eecs.umich.edu mul1u rax, t1, flags=(OF,CF) 735081Sgblack@eecs.umich.edu mulel rax 746463Sgblack@eecs.umich.edu muleh ah 755081Sgblack@eecs.umich.edu}; 765081Sgblack@eecs.umich.edu 775081Sgblack@eecs.umich.edudef macroop MUL_B_P 785081Sgblack@eecs.umich.edu{ 795081Sgblack@eecs.umich.edu rdip t7 805081Sgblack@eecs.umich.edu ld t1, seg, riprel, disp 816463Sgblack@eecs.umich.edu mul1u rax, t1, flags=(OF,CF) 825081Sgblack@eecs.umich.edu mulel rax 836463Sgblack@eecs.umich.edu muleh ah 845081Sgblack@eecs.umich.edu}; 855081Sgblack@eecs.umich.edu 865081Sgblack@eecs.umich.edu# 875081Sgblack@eecs.umich.edu# One operand unsigned multiply. 885081Sgblack@eecs.umich.edu# 895081Sgblack@eecs.umich.edu 905081Sgblack@eecs.umich.edudef macroop MUL_R 915081Sgblack@eecs.umich.edu{ 926463Sgblack@eecs.umich.edu mul1u rax, reg, flags=(OF,CF) 935081Sgblack@eecs.umich.edu mulel rax 946463Sgblack@eecs.umich.edu muleh rdx 955081Sgblack@eecs.umich.edu}; 965081Sgblack@eecs.umich.edu 975081Sgblack@eecs.umich.edudef macroop MUL_M 985081Sgblack@eecs.umich.edu{ 995081Sgblack@eecs.umich.edu ld t1, seg, sib, disp 1006463Sgblack@eecs.umich.edu mul1u rax, t1, flags=(OF,CF) 1015081Sgblack@eecs.umich.edu mulel rax 1026463Sgblack@eecs.umich.edu muleh rdx 1035081Sgblack@eecs.umich.edu}; 1045081Sgblack@eecs.umich.edu 1055081Sgblack@eecs.umich.edudef macroop MUL_P 1065081Sgblack@eecs.umich.edu{ 1075081Sgblack@eecs.umich.edu rdip t7 1085081Sgblack@eecs.umich.edu ld t1, seg, riprel, disp 1096463Sgblack@eecs.umich.edu mul1u rax, t1, flags=(OF,CF) 1105081Sgblack@eecs.umich.edu mulel rax 1116463Sgblack@eecs.umich.edu muleh rdx 1125081Sgblack@eecs.umich.edu}; 1135081Sgblack@eecs.umich.edu 1145081Sgblack@eecs.umich.edu# 1155081Sgblack@eecs.umich.edu# Byte version of one operand signed multiply. 1165081Sgblack@eecs.umich.edu# 1175081Sgblack@eecs.umich.edu 1185081Sgblack@eecs.umich.edudef macroop IMUL_B_R 1195081Sgblack@eecs.umich.edu{ 1206463Sgblack@eecs.umich.edu mul1s rax, reg, flags=(OF,CF) 1215081Sgblack@eecs.umich.edu mulel rax 1226463Sgblack@eecs.umich.edu muleh ah 1235081Sgblack@eecs.umich.edu}; 1245081Sgblack@eecs.umich.edu 1255081Sgblack@eecs.umich.edudef macroop IMUL_B_M 1265081Sgblack@eecs.umich.edu{ 1275081Sgblack@eecs.umich.edu ld t1, seg, sib, disp 1286463Sgblack@eecs.umich.edu mul1s rax, t1, flags=(OF,CF) 1295081Sgblack@eecs.umich.edu mulel rax 1306463Sgblack@eecs.umich.edu muleh ah 1315081Sgblack@eecs.umich.edu}; 1325081Sgblack@eecs.umich.edu 1335081Sgblack@eecs.umich.edudef macroop IMUL_B_P 1345081Sgblack@eecs.umich.edu{ 1355081Sgblack@eecs.umich.edu rdip t7 1365081Sgblack@eecs.umich.edu ld t1, seg, riprel, disp 1376463Sgblack@eecs.umich.edu mul1s rax, t1, flags=(OF,CF) 1385081Sgblack@eecs.umich.edu mulel rax 1396463Sgblack@eecs.umich.edu muleh ah 1405081Sgblack@eecs.umich.edu}; 1415081Sgblack@eecs.umich.edu 1425081Sgblack@eecs.umich.edu# 1435081Sgblack@eecs.umich.edu# One operand signed multiply. 1445081Sgblack@eecs.umich.edu# 1455081Sgblack@eecs.umich.edu 1465081Sgblack@eecs.umich.edudef macroop IMUL_R 1475081Sgblack@eecs.umich.edu{ 1486463Sgblack@eecs.umich.edu mul1s rax, reg, flags=(OF,CF) 1495081Sgblack@eecs.umich.edu mulel rax 1506463Sgblack@eecs.umich.edu muleh rdx 1515081Sgblack@eecs.umich.edu}; 1525081Sgblack@eecs.umich.edu 1535081Sgblack@eecs.umich.edudef macroop IMUL_M 1545081Sgblack@eecs.umich.edu{ 1555081Sgblack@eecs.umich.edu ld t1, seg, sib, disp 1566463Sgblack@eecs.umich.edu mul1s rax, t1, flags=(OF,CF) 1575081Sgblack@eecs.umich.edu mulel rax 1586463Sgblack@eecs.umich.edu muleh rdx 1595081Sgblack@eecs.umich.edu}; 1605081Sgblack@eecs.umich.edu 1615081Sgblack@eecs.umich.edudef macroop IMUL_P 1625081Sgblack@eecs.umich.edu{ 1635081Sgblack@eecs.umich.edu rdip t7 1645081Sgblack@eecs.umich.edu ld t1, seg, riprel, disp 1656463Sgblack@eecs.umich.edu mul1s rax, t1, flags=(OF,CF) 1665081Sgblack@eecs.umich.edu mulel rax 1676463Sgblack@eecs.umich.edu muleh rdx 1685081Sgblack@eecs.umich.edu}; 1695081Sgblack@eecs.umich.edu 1705081Sgblack@eecs.umich.edudef macroop IMUL_R_R 1715081Sgblack@eecs.umich.edu{ 1726463Sgblack@eecs.umich.edu mul1s reg, regm, flags=(OF,CF) 1735081Sgblack@eecs.umich.edu mulel reg 1746463Sgblack@eecs.umich.edu muleh t0 1755081Sgblack@eecs.umich.edu}; 1765081Sgblack@eecs.umich.edu 1775081Sgblack@eecs.umich.edudef macroop IMUL_R_M 1785081Sgblack@eecs.umich.edu{ 1795081Sgblack@eecs.umich.edu ld t1, seg, sib, disp 1806463Sgblack@eecs.umich.edu mul1s reg, t1, flags=(CF,OF) 1815081Sgblack@eecs.umich.edu mulel reg 1826463Sgblack@eecs.umich.edu muleh t0 1835081Sgblack@eecs.umich.edu}; 1845081Sgblack@eecs.umich.edu 1855081Sgblack@eecs.umich.edudef macroop IMUL_R_P 1865081Sgblack@eecs.umich.edu{ 1875081Sgblack@eecs.umich.edu rdip t7 1885081Sgblack@eecs.umich.edu ld t1, seg, riprel, disp 1896463Sgblack@eecs.umich.edu mul1s reg, t1, flags=(CF,OF) 1905081Sgblack@eecs.umich.edu mulel reg 1916463Sgblack@eecs.umich.edu muleh t0 1925081Sgblack@eecs.umich.edu}; 1935081Sgblack@eecs.umich.edu 1945081Sgblack@eecs.umich.edu# 1955081Sgblack@eecs.umich.edu# Three operand signed multiply. 1965081Sgblack@eecs.umich.edu# 1975081Sgblack@eecs.umich.edu 1985081Sgblack@eecs.umich.edudef macroop IMUL_R_R_I 1995081Sgblack@eecs.umich.edu{ 2005081Sgblack@eecs.umich.edu limm t1, imm 2016463Sgblack@eecs.umich.edu mul1s regm, t1, flags=(OF,CF) 2025081Sgblack@eecs.umich.edu mulel reg 2036463Sgblack@eecs.umich.edu muleh t0 2045081Sgblack@eecs.umich.edu}; 2055081Sgblack@eecs.umich.edu 2065081Sgblack@eecs.umich.edudef macroop IMUL_R_M_I 2075081Sgblack@eecs.umich.edu{ 2085081Sgblack@eecs.umich.edu limm t1, imm 2095081Sgblack@eecs.umich.edu ld t2, seg, sib, disp 2106463Sgblack@eecs.umich.edu mul1s t2, t1, flags=(OF,CF) 2115081Sgblack@eecs.umich.edu mulel reg 2126463Sgblack@eecs.umich.edu muleh t0 2135081Sgblack@eecs.umich.edu}; 2145081Sgblack@eecs.umich.edu 2155081Sgblack@eecs.umich.edudef macroop IMUL_R_P_I 2165081Sgblack@eecs.umich.edu{ 2175081Sgblack@eecs.umich.edu rdip t7 2185081Sgblack@eecs.umich.edu limm t1, imm 2195081Sgblack@eecs.umich.edu ld t2, seg, riprel 2206463Sgblack@eecs.umich.edu mul1s t2, t1, flags=(OF,CF) 2215081Sgblack@eecs.umich.edu mulel reg 2226463Sgblack@eecs.umich.edu muleh t0 2235081Sgblack@eecs.umich.edu}; 2245081Sgblack@eecs.umich.edu 2255081Sgblack@eecs.umich.edu# 2265081Sgblack@eecs.umich.edu# One byte version of unsigned division 2275081Sgblack@eecs.umich.edu# 2285081Sgblack@eecs.umich.edu 2295081Sgblack@eecs.umich.edudef macroop DIV_B_R 2305081Sgblack@eecs.umich.edu{ 2315081Sgblack@eecs.umich.edu # Do the initial part of the division 2326459Sgblack@eecs.umich.edu div1 ah, reg, dataSize=1 2335081Sgblack@eecs.umich.edu 2345081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 2355081Sgblack@eecs.umich.edu #second register 2365081Sgblack@eecs.umich.edu div2i t1, rax, 8, dataSize=1 2375081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2385081Sgblack@eecs.umich.edu 2395081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 2405081Sgblack@eecs.umich.edudivLoopTop: 2415081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2425081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,), dataSize=1 2435661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 2445081Sgblack@eecs.umich.edu 2455081Sgblack@eecs.umich.edu #Unload the answer 2465081Sgblack@eecs.umich.edu divq rax, dataSize=1 2476459Sgblack@eecs.umich.edu divr ah, dataSize=1 2485081Sgblack@eecs.umich.edu}; 2495081Sgblack@eecs.umich.edu 2505081Sgblack@eecs.umich.edudef macroop DIV_B_M 2515081Sgblack@eecs.umich.edu{ 2525081Sgblack@eecs.umich.edu ld t2, seg, sib, disp 2535081Sgblack@eecs.umich.edu 2545081Sgblack@eecs.umich.edu # Do the initial part of the division 2556459Sgblack@eecs.umich.edu div1 ah, t2, dataSize=1 2565081Sgblack@eecs.umich.edu 2575081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 2585081Sgblack@eecs.umich.edu #second register 2595081Sgblack@eecs.umich.edu div2i t1, rax, 8, dataSize=1 2605081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2615081Sgblack@eecs.umich.edu 2625081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 2635081Sgblack@eecs.umich.edudivLoopTop: 2645081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2655081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,), dataSize=1 2665661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 2675081Sgblack@eecs.umich.edu 2685081Sgblack@eecs.umich.edu #Unload the answer 2695081Sgblack@eecs.umich.edu divq rax, dataSize=1 2706459Sgblack@eecs.umich.edu divr ah, dataSize=1 2715081Sgblack@eecs.umich.edu}; 2725081Sgblack@eecs.umich.edu 2735081Sgblack@eecs.umich.edudef macroop DIV_B_P 2745081Sgblack@eecs.umich.edu{ 2755081Sgblack@eecs.umich.edu rdip t7 2765081Sgblack@eecs.umich.edu ld t2, seg, riprel, disp 2775081Sgblack@eecs.umich.edu 2785081Sgblack@eecs.umich.edu # Do the initial part of the division 2796459Sgblack@eecs.umich.edu div1 ah, t2, dataSize=1 2805081Sgblack@eecs.umich.edu 2815081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 2825081Sgblack@eecs.umich.edu #second register 2835081Sgblack@eecs.umich.edu div2i t1, rax, 8, dataSize=1 2845081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2855081Sgblack@eecs.umich.edu 2865081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 2875081Sgblack@eecs.umich.edudivLoopTop: 2885081Sgblack@eecs.umich.edu div2 t1, rax, t1, dataSize=1 2895081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,), dataSize=1 2905661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 2915081Sgblack@eecs.umich.edu 2925081Sgblack@eecs.umich.edu #Unload the answer 2935081Sgblack@eecs.umich.edu divq rax, dataSize=1 2946459Sgblack@eecs.umich.edu divr ah, dataSize=1 2955081Sgblack@eecs.umich.edu}; 2965081Sgblack@eecs.umich.edu 2975081Sgblack@eecs.umich.edu# 2985081Sgblack@eecs.umich.edu# Unsigned division 2995081Sgblack@eecs.umich.edu# 3005081Sgblack@eecs.umich.edu 3015081Sgblack@eecs.umich.edudef macroop DIV_R 3025081Sgblack@eecs.umich.edu{ 3035081Sgblack@eecs.umich.edu # Do the initial part of the division 3045081Sgblack@eecs.umich.edu div1 rdx, reg 3055081Sgblack@eecs.umich.edu 3065081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 3075081Sgblack@eecs.umich.edu #second register 3085081Sgblack@eecs.umich.edu div2i t1, rax, "env.dataSize * 8" 3095081Sgblack@eecs.umich.edu div2 t1, rax, t1 3105081Sgblack@eecs.umich.edu 3115081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 3125081Sgblack@eecs.umich.edu #The amount of unrolling here could stand some tuning 3135081Sgblack@eecs.umich.edudivLoopTop: 3145081Sgblack@eecs.umich.edu div2 t1, rax, t1 3155081Sgblack@eecs.umich.edu div2 t1, rax, t1 3165081Sgblack@eecs.umich.edu div2 t1, rax, t1 3175081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,) 3185661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 3195081Sgblack@eecs.umich.edu 3205081Sgblack@eecs.umich.edu #Unload the answer 3215081Sgblack@eecs.umich.edu divq rax 3225081Sgblack@eecs.umich.edu divr rdx 3235081Sgblack@eecs.umich.edu}; 3245081Sgblack@eecs.umich.edu 3255081Sgblack@eecs.umich.edudef macroop DIV_M 3265081Sgblack@eecs.umich.edu{ 3275081Sgblack@eecs.umich.edu ld t2, seg, sib, disp 3285081Sgblack@eecs.umich.edu 3295081Sgblack@eecs.umich.edu # Do the initial part of the division 3305081Sgblack@eecs.umich.edu div1 rdx, t2 3315081Sgblack@eecs.umich.edu 3325081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 3335081Sgblack@eecs.umich.edu #second register 3345081Sgblack@eecs.umich.edu div2i t1, rax, "env.dataSize * 8" 3355081Sgblack@eecs.umich.edu div2 t1, rax, t1 3365081Sgblack@eecs.umich.edu 3375081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 3385081Sgblack@eecs.umich.edu #The amount of unrolling here could stand some tuning 3395081Sgblack@eecs.umich.edudivLoopTop: 3405081Sgblack@eecs.umich.edu div2 t1, rax, t1 3415081Sgblack@eecs.umich.edu div2 t1, rax, t1 3425081Sgblack@eecs.umich.edu div2 t1, rax, t1 3435081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,) 3445661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 3455081Sgblack@eecs.umich.edu 3465081Sgblack@eecs.umich.edu #Unload the answer 3475081Sgblack@eecs.umich.edu divq rax 3485081Sgblack@eecs.umich.edu divr rdx 3495081Sgblack@eecs.umich.edu}; 3505081Sgblack@eecs.umich.edu 3515081Sgblack@eecs.umich.edudef macroop DIV_P 3525081Sgblack@eecs.umich.edu{ 3535081Sgblack@eecs.umich.edu rdip t7 3545081Sgblack@eecs.umich.edu ld t2, seg, riprel, disp 3555081Sgblack@eecs.umich.edu 3565081Sgblack@eecs.umich.edu # Do the initial part of the division 3575081Sgblack@eecs.umich.edu div1 rdx, t2 3585081Sgblack@eecs.umich.edu 3595081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 3605081Sgblack@eecs.umich.edu #second register 3615081Sgblack@eecs.umich.edu div2i t1, rax, "env.dataSize * 8" 3625081Sgblack@eecs.umich.edu div2 t1, rax, t1 3635081Sgblack@eecs.umich.edu 3645081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 3655081Sgblack@eecs.umich.edu #The amount of unrolling here could stand some tuning 3665081Sgblack@eecs.umich.edudivLoopTop: 3675081Sgblack@eecs.umich.edu div2 t1, rax, t1 3685081Sgblack@eecs.umich.edu div2 t1, rax, t1 3695081Sgblack@eecs.umich.edu div2 t1, rax, t1 3705081Sgblack@eecs.umich.edu div2 t1, rax, t1, flags=(EZF,) 3715661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 3725081Sgblack@eecs.umich.edu 3735081Sgblack@eecs.umich.edu #Unload the answer 3745081Sgblack@eecs.umich.edu divq rax 3755081Sgblack@eecs.umich.edu divr rdx 3765081Sgblack@eecs.umich.edu}; 3775081Sgblack@eecs.umich.edu 3785081Sgblack@eecs.umich.edu# 3795081Sgblack@eecs.umich.edu# One byte version of signed division 3805081Sgblack@eecs.umich.edu# 3815081Sgblack@eecs.umich.edu 3825081Sgblack@eecs.umich.edudef macroop IDIV_B_R 3835081Sgblack@eecs.umich.edu{ 3845081Sgblack@eecs.umich.edu # Negate dividend 3855081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,), dataSize=1 3865081Sgblack@eecs.umich.edu ruflag t4, 3 3876459Sgblack@eecs.umich.edu sub t2, t0, ah, dataSize=1 3885081Sgblack@eecs.umich.edu sub t2, t2, t4 3895081Sgblack@eecs.umich.edu 3905081Sgblack@eecs.umich.edu #Find the sign of the divisor 3915081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 3925081Sgblack@eecs.umich.edu slli t0, reg, 1, flags=(ECF,), dataSize=1 3935081Sgblack@eecs.umich.edu 3945081Sgblack@eecs.umich.edu # Negate divisor 3955081Sgblack@eecs.umich.edu sub t3, t0, reg, dataSize=1 3965081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 3975081Sgblack@eecs.umich.edu mov t3, t3, reg, flags=(nCECF,), dataSize=1 3985081Sgblack@eecs.umich.edu 3995081Sgblack@eecs.umich.edu #Find the sign of the dividend 4005081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 4016459Sgblack@eecs.umich.edu slli t0, ah, 1, flags=(ECF,), dataSize=1 4025081Sgblack@eecs.umich.edu 4035081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 4045081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,), dataSize=1 4056459Sgblack@eecs.umich.edu mov t2, t2, ah, flags=(nCECF,), dataSize=1 4065081Sgblack@eecs.umich.edu 4075081Sgblack@eecs.umich.edu # Do the initial part of the division 4085081Sgblack@eecs.umich.edu div1 t2, t3, dataSize=1 4095081Sgblack@eecs.umich.edu 4105081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 4115081Sgblack@eecs.umich.edu #second register 4125081Sgblack@eecs.umich.edu div2i t4, t1, 8, dataSize=1 4135081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 4145081Sgblack@eecs.umich.edu 4155081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 4165081Sgblack@eecs.umich.edudivLoopTop: 4175081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 4185081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,), dataSize=1 4195661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 4205081Sgblack@eecs.umich.edu 4215081Sgblack@eecs.umich.edu #Unload the answer 4225081Sgblack@eecs.umich.edu divq t5, dataSize=1 4235081Sgblack@eecs.umich.edu divr t6, dataSize=1 4245081Sgblack@eecs.umich.edu 4255081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 4265081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 4275081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 4285081Sgblack@eecs.umich.edu # were different. 4295081Sgblack@eecs.umich.edu 4305081Sgblack@eecs.umich.edu # Negate the remainder 4315081Sgblack@eecs.umich.edu sub t4, t0, t6, dataSize=1 4326459Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in ah. 4336459Sgblack@eecs.umich.edu mov ah, ah, t4, (CECF,), dataSize=1 4346459Sgblack@eecs.umich.edu # Otherwise put the regular remainder in ah. 4356459Sgblack@eecs.umich.edu mov ah, ah, t6, (nCECF,), dataSize=1 4365081Sgblack@eecs.umich.edu 4375081Sgblack@eecs.umich.edu # Negate the quotient. 4385081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 4395081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 4405081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,), dataSize=1 4415081Sgblack@eecs.umich.edu 4425081Sgblack@eecs.umich.edu # Check the sign of the divisor 4435081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,), dataSize=1 4445081Sgblack@eecs.umich.edu 4455081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 4465081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 4475081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 4485081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,), dataSize=1 4495081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 4505081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,), dataSize=1 4515081Sgblack@eecs.umich.edu}; 4525081Sgblack@eecs.umich.edu 4535081Sgblack@eecs.umich.edudef macroop IDIV_B_M 4545081Sgblack@eecs.umich.edu{ 4555081Sgblack@eecs.umich.edu # Negate dividend 4565081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,), dataSize=1 4575081Sgblack@eecs.umich.edu ruflag t4, 3 4586459Sgblack@eecs.umich.edu sub t2, t0, ah, dataSize=1 4595081Sgblack@eecs.umich.edu sub t2, t2, t4 4605081Sgblack@eecs.umich.edu 4615081Sgblack@eecs.umich.edu ld t3, seg, sib, disp 4625081Sgblack@eecs.umich.edu 4635081Sgblack@eecs.umich.edu #Find the sign of the divisor 4645081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 4655081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,), dataSize=1 4665081Sgblack@eecs.umich.edu 4675081Sgblack@eecs.umich.edu # Negate divisor 4685081Sgblack@eecs.umich.edu sub t4, t0, t3, dataSize=1 4695081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 4705081Sgblack@eecs.umich.edu mov t3, t3, t4, flags=(CECF,), dataSize=1 4715081Sgblack@eecs.umich.edu 4725081Sgblack@eecs.umich.edu #Find the sign of the dividend 4735081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 4746459Sgblack@eecs.umich.edu slli t0, ah, 1, flags=(ECF,), dataSize=1 4755081Sgblack@eecs.umich.edu 4765081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 4775081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,), dataSize=1 4786459Sgblack@eecs.umich.edu mov t2, t2, ah, flags=(nCECF,), dataSize=1 4795081Sgblack@eecs.umich.edu 4805081Sgblack@eecs.umich.edu # Do the initial part of the division 4815081Sgblack@eecs.umich.edu div1 t2, t3, dataSize=1 4825081Sgblack@eecs.umich.edu 4835081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 4845081Sgblack@eecs.umich.edu #second register 4855081Sgblack@eecs.umich.edu div2i t4, t1, 8, dataSize=1 4865081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 4875081Sgblack@eecs.umich.edu 4885081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 4895081Sgblack@eecs.umich.edudivLoopTop: 4905081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 4915081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,), dataSize=1 4925661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 4935081Sgblack@eecs.umich.edu 4945081Sgblack@eecs.umich.edu #Unload the answer 4955081Sgblack@eecs.umich.edu divq t5, dataSize=1 4965081Sgblack@eecs.umich.edu divr t6, dataSize=1 4975081Sgblack@eecs.umich.edu 4985081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 4995081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 5005081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 5015081Sgblack@eecs.umich.edu # were different. 5025081Sgblack@eecs.umich.edu 5035081Sgblack@eecs.umich.edu # Negate the remainder 5045081Sgblack@eecs.umich.edu sub t4, t0, t6, dataSize=1 5056459Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in ah. 5066459Sgblack@eecs.umich.edu mov ah, ah, t4, (CECF,), dataSize=1 5076459Sgblack@eecs.umich.edu # Otherwise put the regular remainder in ah. 5086459Sgblack@eecs.umich.edu mov ah, ah, t6, (nCECF,), dataSize=1 5095081Sgblack@eecs.umich.edu 5105081Sgblack@eecs.umich.edu # Negate the quotient. 5115081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 5125081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 5135081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,), dataSize=1 5145081Sgblack@eecs.umich.edu 5155081Sgblack@eecs.umich.edu # Check the sign of the divisor 5165081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,), dataSize=1 5175081Sgblack@eecs.umich.edu 5185081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 5195081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 5205081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 5215081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,), dataSize=1 5225081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 5235081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,), dataSize=1 5245081Sgblack@eecs.umich.edu}; 5255081Sgblack@eecs.umich.edu 5265081Sgblack@eecs.umich.edudef macroop IDIV_B_P 5275081Sgblack@eecs.umich.edu{ 5285081Sgblack@eecs.umich.edu # Negate dividend 5295081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,), dataSize=1 5305081Sgblack@eecs.umich.edu ruflag t4, 3 5316459Sgblack@eecs.umich.edu sub t2, t0, ah, dataSize=1 5325081Sgblack@eecs.umich.edu sub t2, t2, t4 5335081Sgblack@eecs.umich.edu 5345081Sgblack@eecs.umich.edu rdip t7 5355081Sgblack@eecs.umich.edu ld t3, seg, riprel, disp 5365081Sgblack@eecs.umich.edu 5375081Sgblack@eecs.umich.edu #Find the sign of the divisor 5385081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 5395081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,), dataSize=1 5405081Sgblack@eecs.umich.edu 5415081Sgblack@eecs.umich.edu # Negate divisor 5425081Sgblack@eecs.umich.edu sub t4, t0, t3, dataSize=1 5435081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 5445081Sgblack@eecs.umich.edu mov t3, t3, t4, flags=(CECF,), dataSize=1 5455081Sgblack@eecs.umich.edu 5465081Sgblack@eecs.umich.edu #Find the sign of the dividend 5475081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 5486459Sgblack@eecs.umich.edu slli t0, ah, 1, flags=(ECF,), dataSize=1 5495081Sgblack@eecs.umich.edu 5505081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 5515081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,), dataSize=1 5526459Sgblack@eecs.umich.edu mov t2, t2, ah, flags=(nCECF,), dataSize=1 5535081Sgblack@eecs.umich.edu 5545081Sgblack@eecs.umich.edu # Do the initial part of the division 5555081Sgblack@eecs.umich.edu div1 t2, t3, dataSize=1 5565081Sgblack@eecs.umich.edu 5575081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 5585081Sgblack@eecs.umich.edu #second register 5595081Sgblack@eecs.umich.edu div2i t4, t1, 8, dataSize=1 5605081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 5615081Sgblack@eecs.umich.edu 5625081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 5635081Sgblack@eecs.umich.edudivLoopTop: 5645081Sgblack@eecs.umich.edu div2 t4, t1, t4, dataSize=1 5655081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,), dataSize=1 5665661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 5675081Sgblack@eecs.umich.edu 5685081Sgblack@eecs.umich.edu #Unload the answer 5695081Sgblack@eecs.umich.edu divq t5, dataSize=1 5705081Sgblack@eecs.umich.edu divr t6, dataSize=1 5715081Sgblack@eecs.umich.edu 5725081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 5735081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 5745081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 5755081Sgblack@eecs.umich.edu # were different. 5765081Sgblack@eecs.umich.edu 5775081Sgblack@eecs.umich.edu # Negate the remainder 5785081Sgblack@eecs.umich.edu sub t4, t0, t6, dataSize=1 5796459Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in ah. 5806459Sgblack@eecs.umich.edu mov ah, ah, t4, (CECF,), dataSize=1 5816459Sgblack@eecs.umich.edu # Otherwise put the regular remainder in ah. 5826459Sgblack@eecs.umich.edu mov ah, ah, t6, (nCECF,), dataSize=1 5835081Sgblack@eecs.umich.edu 5845081Sgblack@eecs.umich.edu # Negate the quotient. 5855081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 5865081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 5875081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,), dataSize=1 5885081Sgblack@eecs.umich.edu 5895081Sgblack@eecs.umich.edu # Check the sign of the divisor 5905081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,), dataSize=1 5915081Sgblack@eecs.umich.edu 5925081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 5935081Sgblack@eecs.umich.edu sub t4, t0, t5, dataSize=1 5945081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 5955081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,), dataSize=1 5965081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 5975081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,), dataSize=1 5985081Sgblack@eecs.umich.edu}; 5995081Sgblack@eecs.umich.edu 6005081Sgblack@eecs.umich.edu# 6015081Sgblack@eecs.umich.edu# Signed division 6025081Sgblack@eecs.umich.edu# 6035081Sgblack@eecs.umich.edu 6045081Sgblack@eecs.umich.edudef macroop IDIV_R 6055081Sgblack@eecs.umich.edu{ 6065081Sgblack@eecs.umich.edu # Negate dividend 6075081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,) 6085081Sgblack@eecs.umich.edu ruflag t4, 3 6095081Sgblack@eecs.umich.edu sub t2, t0, rdx 6105081Sgblack@eecs.umich.edu sub t2, t2, t4 6115081Sgblack@eecs.umich.edu 6125081Sgblack@eecs.umich.edu #Find the sign of the divisor 6135081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 6145081Sgblack@eecs.umich.edu slli t0, reg, 1, flags=(ECF,) 6155081Sgblack@eecs.umich.edu 6165081Sgblack@eecs.umich.edu # Negate divisor 6175081Sgblack@eecs.umich.edu sub t3, t0, reg 6185081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 6195081Sgblack@eecs.umich.edu mov t3, t3, reg, flags=(nCECF,) 6205081Sgblack@eecs.umich.edu 6215081Sgblack@eecs.umich.edu #Find the sign of the dividend 6225081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 6235081Sgblack@eecs.umich.edu slli t0, rdx, 1, flags=(ECF,) 6245081Sgblack@eecs.umich.edu 6255081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 6265081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,) 6275081Sgblack@eecs.umich.edu mov t2, t2, rdx, flags=(nCECF,) 6285081Sgblack@eecs.umich.edu 6295081Sgblack@eecs.umich.edu # Do the initial part of the division 6305081Sgblack@eecs.umich.edu div1 t2, t3 6315081Sgblack@eecs.umich.edu 6325081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 6335081Sgblack@eecs.umich.edu #second register 6345081Sgblack@eecs.umich.edu div2i t4, t1, "env.dataSize * 8" 6355081Sgblack@eecs.umich.edu div2 t4, t1, t4 6365081Sgblack@eecs.umich.edu 6375081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 6385081Sgblack@eecs.umich.edudivLoopTop: 6395081Sgblack@eecs.umich.edu div2 t4, t1, t4 6405081Sgblack@eecs.umich.edu div2 t4, t1, t4 6415081Sgblack@eecs.umich.edu div2 t4, t1, t4 6425081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,) 6435661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 6445081Sgblack@eecs.umich.edu 6455081Sgblack@eecs.umich.edu #Unload the answer 6465081Sgblack@eecs.umich.edu divq t5 6475081Sgblack@eecs.umich.edu divr t6 6485081Sgblack@eecs.umich.edu 6495081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 6505081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 6515081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 6525081Sgblack@eecs.umich.edu # were different. 6535081Sgblack@eecs.umich.edu 6545081Sgblack@eecs.umich.edu # Negate the remainder 6555081Sgblack@eecs.umich.edu sub t4, t0, t6 6565081Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in rdx. 6575081Sgblack@eecs.umich.edu mov rdx, rdx, t4, (CECF,) 6585081Sgblack@eecs.umich.edu # Otherwise put the regular remainder in rdx. 6595081Sgblack@eecs.umich.edu mov rdx, rdx, t6, (nCECF,) 6605081Sgblack@eecs.umich.edu 6615081Sgblack@eecs.umich.edu # Negate the quotient. 6625081Sgblack@eecs.umich.edu sub t4, t0, t5 6635081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 6645081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,) 6655081Sgblack@eecs.umich.edu 6665081Sgblack@eecs.umich.edu # Check the sign of the divisor 6675081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,) 6685081Sgblack@eecs.umich.edu 6695081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 6705081Sgblack@eecs.umich.edu sub t4, t0, t5 6715081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 6725081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,) 6735081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 6745081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,) 6755081Sgblack@eecs.umich.edu}; 6765081Sgblack@eecs.umich.edu 6775081Sgblack@eecs.umich.edudef macroop IDIV_M 6785081Sgblack@eecs.umich.edu{ 6795081Sgblack@eecs.umich.edu # Negate dividend 6805081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,) 6815081Sgblack@eecs.umich.edu ruflag t4, 3 6825081Sgblack@eecs.umich.edu sub t2, t0, rdx 6835081Sgblack@eecs.umich.edu sub t2, t2, t4 6845081Sgblack@eecs.umich.edu 6855081Sgblack@eecs.umich.edu ld t3, seg, sib, disp 6865081Sgblack@eecs.umich.edu 6875081Sgblack@eecs.umich.edu #Find the sign of the divisor 6885081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 6895081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,) 6905081Sgblack@eecs.umich.edu 6915081Sgblack@eecs.umich.edu # Negate divisor 6925081Sgblack@eecs.umich.edu sub t4, t0, t3 6935081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 6945081Sgblack@eecs.umich.edu mov t3, t3, t4, flags=(CECF,) 6955081Sgblack@eecs.umich.edu 6965081Sgblack@eecs.umich.edu #Find the sign of the dividend 6975081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 6985081Sgblack@eecs.umich.edu slli t0, rdx, 1, flags=(ECF,) 6995081Sgblack@eecs.umich.edu 7005081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 7015081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,) 7025081Sgblack@eecs.umich.edu mov t2, t2, rdx, flags=(nCECF,) 7035081Sgblack@eecs.umich.edu 7045081Sgblack@eecs.umich.edu # Do the initial part of the division 7055081Sgblack@eecs.umich.edu div1 t2, t3 7065081Sgblack@eecs.umich.edu 7075081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 7085081Sgblack@eecs.umich.edu #second register 7095081Sgblack@eecs.umich.edu div2i t4, t1, "env.dataSize * 8" 7105081Sgblack@eecs.umich.edu div2 t4, t1, t4 7115081Sgblack@eecs.umich.edu 7125081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 7135081Sgblack@eecs.umich.edudivLoopTop: 7145081Sgblack@eecs.umich.edu div2 t4, t1, t4 7155081Sgblack@eecs.umich.edu div2 t4, t1, t4 7165081Sgblack@eecs.umich.edu div2 t4, t1, t4 7175081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,) 7185661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 7195081Sgblack@eecs.umich.edu 7205081Sgblack@eecs.umich.edu #Unload the answer 7215081Sgblack@eecs.umich.edu divq t5 7225081Sgblack@eecs.umich.edu divr t6 7235081Sgblack@eecs.umich.edu 7245081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 7255081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 7265081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 7275081Sgblack@eecs.umich.edu # were different. 7285081Sgblack@eecs.umich.edu 7295081Sgblack@eecs.umich.edu # Negate the remainder 7305081Sgblack@eecs.umich.edu sub t4, t0, t6 7315081Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in rdx. 7325081Sgblack@eecs.umich.edu mov rdx, rdx, t4, (CECF,) 7335081Sgblack@eecs.umich.edu # Otherwise put the regular remainder in rdx. 7345081Sgblack@eecs.umich.edu mov rdx, rdx, t6, (nCECF,) 7355081Sgblack@eecs.umich.edu 7365081Sgblack@eecs.umich.edu # Negate the quotient. 7375081Sgblack@eecs.umich.edu sub t4, t0, t5 7385081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 7395081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,) 7405081Sgblack@eecs.umich.edu 7415081Sgblack@eecs.umich.edu # Check the sign of the divisor 7425081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,) 7435081Sgblack@eecs.umich.edu 7445081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 7455081Sgblack@eecs.umich.edu sub t4, t0, t5 7465081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 7475081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,) 7485081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 7495081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,) 7505081Sgblack@eecs.umich.edu}; 7515081Sgblack@eecs.umich.edu 7525081Sgblack@eecs.umich.edudef macroop IDIV_P 7535081Sgblack@eecs.umich.edu{ 7545081Sgblack@eecs.umich.edu # Negate dividend 7555081Sgblack@eecs.umich.edu sub t1, t0, rax, flags=(ECF,) 7565081Sgblack@eecs.umich.edu ruflag t4, 3 7575081Sgblack@eecs.umich.edu sub t2, t0, rdx 7585081Sgblack@eecs.umich.edu sub t2, t2, t4 7595081Sgblack@eecs.umich.edu 7605081Sgblack@eecs.umich.edu rdip t7 7615081Sgblack@eecs.umich.edu ld t3, seg, riprel, disp 7625081Sgblack@eecs.umich.edu 7635081Sgblack@eecs.umich.edu #Find the sign of the divisor 7645081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 7655081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,) 7665081Sgblack@eecs.umich.edu 7675081Sgblack@eecs.umich.edu # Negate divisor 7685081Sgblack@eecs.umich.edu sub t4, t0, t3 7695081Sgblack@eecs.umich.edu # Put the divisor's absolute value into t3 7705081Sgblack@eecs.umich.edu mov t3, t3, t4, flags=(CECF,) 7715081Sgblack@eecs.umich.edu 7725081Sgblack@eecs.umich.edu #Find the sign of the dividend 7735081Sgblack@eecs.umich.edu #FIXME!!! This depends on shifts setting the carry flag correctly. 7745081Sgblack@eecs.umich.edu slli t0, rdx, 1, flags=(ECF,) 7755081Sgblack@eecs.umich.edu 7765081Sgblack@eecs.umich.edu # Put the dividend's absolute value into t1 and t2 7775081Sgblack@eecs.umich.edu mov t1, t1, rax, flags=(nCECF,) 7785081Sgblack@eecs.umich.edu mov t2, t2, rdx, flags=(nCECF,) 7795081Sgblack@eecs.umich.edu 7805081Sgblack@eecs.umich.edu # Do the initial part of the division 7815081Sgblack@eecs.umich.edu div1 t2, t3 7825081Sgblack@eecs.umich.edu 7835081Sgblack@eecs.umich.edu #These are split out so we can initialize the number of bits in the 7845081Sgblack@eecs.umich.edu #second register 7855081Sgblack@eecs.umich.edu div2i t4, t1, "env.dataSize * 8" 7865081Sgblack@eecs.umich.edu div2 t4, t1, t4 7875081Sgblack@eecs.umich.edu 7885081Sgblack@eecs.umich.edu #Loop until we're out of bits to shift in 7895081Sgblack@eecs.umich.edudivLoopTop: 7905081Sgblack@eecs.umich.edu div2 t4, t1, t4 7915081Sgblack@eecs.umich.edu div2 t4, t1, t4 7925081Sgblack@eecs.umich.edu div2 t4, t1, t4 7935081Sgblack@eecs.umich.edu div2 t4, t1, t4, flags=(EZF,) 7945661Sgblack@eecs.umich.edu br label("divLoopTop"), flags=(nCEZF,) 7955081Sgblack@eecs.umich.edu 7965081Sgblack@eecs.umich.edu #Unload the answer 7975081Sgblack@eecs.umich.edu divq t5 7985081Sgblack@eecs.umich.edu divr t6 7995081Sgblack@eecs.umich.edu 8005081Sgblack@eecs.umich.edu # Fix up signs. The sign of the dividend is still lying around in ECF. 8015081Sgblack@eecs.umich.edu # The sign of the remainder, ah, is the same as the dividend. The sign 8025081Sgblack@eecs.umich.edu # of the quotient is negated if the signs of the divisor and dividend 8035081Sgblack@eecs.umich.edu # were different. 8045081Sgblack@eecs.umich.edu 8055081Sgblack@eecs.umich.edu # Negate the remainder 8065081Sgblack@eecs.umich.edu sub t4, t0, t6 8075081Sgblack@eecs.umich.edu # If the dividend was negitive, put the negated remainder in rdx. 8085081Sgblack@eecs.umich.edu mov rdx, rdx, t4, (CECF,) 8095081Sgblack@eecs.umich.edu # Otherwise put the regular remainder in rdx. 8105081Sgblack@eecs.umich.edu mov rdx, rdx, t6, (nCECF,) 8115081Sgblack@eecs.umich.edu 8125081Sgblack@eecs.umich.edu # Negate the quotient. 8135081Sgblack@eecs.umich.edu sub t4, t0, t5 8145081Sgblack@eecs.umich.edu # If the dividend was negative, start using the negated quotient 8155081Sgblack@eecs.umich.edu mov t5, t5, t4, (CECF,) 8165081Sgblack@eecs.umich.edu 8175081Sgblack@eecs.umich.edu # Check the sign of the divisor 8185081Sgblack@eecs.umich.edu slli t0, t3, 1, flags=(ECF,) 8195081Sgblack@eecs.umich.edu 8205081Sgblack@eecs.umich.edu # Negate the (possibly already negated) quotient 8215081Sgblack@eecs.umich.edu sub t4, t0, t5 8225081Sgblack@eecs.umich.edu # If the divisor was negative, put the negated quotient in rax. 8235081Sgblack@eecs.umich.edu mov rax, rax, t4, (CECF,) 8245081Sgblack@eecs.umich.edu # Otherwise put the one that wasn't negated (at least here) in rax. 8255081Sgblack@eecs.umich.edu mov rax, rax, t5, (nCECF,) 8265081Sgblack@eecs.umich.edu}; 8275081Sgblack@eecs.umich.edu''' 828