add_and_subtract.py revision 6083:c669a6f8fa9e
1# Copyright (c) 2007 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any 9# use which is NOT directed to receiving any direct monetary 10# compensation for, or commercial advantage from such use. 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Neither the name of 30# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 31# contributors may be used to endorse or promote products derived from 32# this software without specific prior written permission. No right of 33# sublicense is granted herewith. Derivatives of the software and 34# output created using the software may be prepared, but only for 35# Non-Commercial Uses. Derivatives of the software may be shared with 36# others provided: (i) the others agree to abide by the list of 37# conditions herein which includes the Non-Commercial Use restrictions; 38# and (ii) such Derivatives of the software include the above copyright 39# notice to acknowledge the contribution from this software where 40# applicable, this list of conditions and the disclaimer below. 41# 42# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 43# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 44# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 45# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 46# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 47# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 48# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 49# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 50# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 51# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53# 54# Authors: Gabe Black 55 56microcode = ''' 57def macroop ADD_R_R 58{ 59 add reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 60}; 61 62def macroop ADD_R_I 63{ 64 limm t1, imm 65 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 66}; 67 68def macroop ADD_M_I 69{ 70 limm t2, imm 71 ldst t1, seg, sib, disp 72 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 73 st t1, seg, sib, disp 74}; 75 76def macroop ADD_P_I 77{ 78 rdip t7 79 limm t2, imm 80 ldst t1, seg, riprel, disp 81 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 82 st t1, seg, riprel, disp 83}; 84 85def macroop ADD_LOCKED_M_I 86{ 87 limm t2, imm 88 ldstl t1, seg, sib, disp 89 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 90 stul t1, seg, sib, disp 91}; 92 93def macroop ADD_LOCKED_P_I 94{ 95 rdip t7 96 limm t2, imm 97 ldstl t1, seg, riprel, disp 98 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 99 stul t1, seg, riprel, disp 100}; 101 102def macroop ADD_M_R 103{ 104 ldst t1, seg, sib, disp 105 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 106 st t1, seg, sib, disp 107}; 108 109def macroop ADD_P_R 110{ 111 rdip t7 112 ldst t1, seg, riprel, disp 113 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 114 st t1, seg, riprel, disp 115}; 116 117def macroop ADD_LOCKED_M_R 118{ 119 ldstl t1, seg, sib, disp 120 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 121 stul t1, seg, sib, disp 122}; 123 124def macroop ADD_LOCKED_P_R 125{ 126 rdip t7 127 ldstl t1, seg, riprel, disp 128 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 129 stul t1, seg, riprel, disp 130}; 131 132def macroop ADD_R_M 133{ 134 ld t1, seg, sib, disp 135 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 136}; 137 138def macroop ADD_R_P 139{ 140 rdip t7 141 ld t1, seg, riprel, disp 142 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 143}; 144 145def macroop SUB_R_R 146{ 147 sub reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 148}; 149 150def macroop SUB_R_I 151{ 152 limm t1, imm 153 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 154}; 155 156def macroop SUB_R_M 157{ 158 ld t1, seg, sib, disp 159 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 160}; 161 162def macroop SUB_R_P 163{ 164 rdip t7 165 ld t1, seg, riprel, disp 166 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 167}; 168 169def macroop SUB_M_I 170{ 171 limm t2, imm 172 ldst t1, seg, sib, disp 173 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 174 st t1, seg, sib, disp 175}; 176 177def macroop SUB_P_I 178{ 179 rdip t7 180 limm t2, imm 181 ldst t1, seg, riprel, disp 182 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 183 st t1, seg, riprel, disp 184}; 185 186def macroop SUB_M_R 187{ 188 ldst t1, seg, sib, disp 189 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 190 st t1, seg, sib, disp 191}; 192 193def macroop SUB_P_R 194{ 195 rdip t7 196 ldst t1, seg, riprel, disp 197 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 198 st t1, seg, riprel, disp 199}; 200 201def macroop ADC_R_R 202{ 203 adc reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 204}; 205 206def macroop ADC_R_I 207{ 208 limm t1, imm 209 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 210}; 211 212def macroop ADC_M_I 213{ 214 limm t2, imm 215 ldst t1, seg, sib, disp 216 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 217 st t1, seg, sib, disp 218}; 219 220def macroop ADC_P_I 221{ 222 rdip t7 223 limm t2, imm 224 ldst t1, seg, riprel, disp 225 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 226 st t1, seg, riprel, disp 227}; 228 229def macroop ADC_LOCKED_M_I 230{ 231 limm t2, imm 232 ldstl t1, seg, sib, disp 233 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 234 stul t1, seg, sib, disp 235}; 236 237def macroop ADC_LOCKED_P_I 238{ 239 rdip t7 240 limm t2, imm 241 ldstl t1, seg, riprel, disp 242 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 243 stul t1, seg, riprel, disp 244}; 245 246def macroop ADC_M_R 247{ 248 ldst t1, seg, sib, disp 249 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 250 st t1, seg, sib, disp 251}; 252 253def macroop ADC_P_R 254{ 255 rdip t7 256 ldst t1, seg, riprel, disp 257 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 258 st t1, seg, riprel, disp 259}; 260 261def macroop ADC_LOCKED_M_R 262{ 263 ldstl t1, seg, sib, disp 264 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 265 stul t1, seg, sib, disp 266}; 267 268def macroop ADC_LOCKED_P_R 269{ 270 rdip t7 271 ldstl t1, seg, riprel, disp 272 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 273 stul t1, seg, riprel, disp 274}; 275 276def macroop ADC_R_M 277{ 278 ld t1, seg, sib, disp 279 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 280}; 281 282def macroop ADC_R_P 283{ 284 rdip t7 285 ld t1, seg, riprel, disp 286 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 287}; 288 289def macroop SBB_R_R 290{ 291 sbb reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 292}; 293 294def macroop SBB_R_I 295{ 296 limm t1, imm 297 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 298}; 299 300def macroop SBB_R_M 301{ 302 ld t1, seg, sib, disp 303 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 304}; 305 306def macroop SBB_R_P 307{ 308 rdip t7 309 ld t1, seg, riprel, disp 310 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 311}; 312 313def macroop SBB_M_I 314{ 315 limm t2, imm 316 ldst t1, seg, sib, disp 317 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 318 st t1, seg, sib, disp 319}; 320 321def macroop SBB_P_I 322{ 323 rdip t7 324 limm t2, imm 325 ldst t1, seg, riprel, disp 326 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 327 st t1, seg, riprel, disp 328}; 329 330def macroop SBB_M_R 331{ 332 ldst t1, seg, sib, disp 333 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 334 st t1, seg, sib, disp 335}; 336 337def macroop SBB_P_R 338{ 339 rdip t7 340 ldst t1, seg, riprel, disp 341 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 342 st t1, seg, riprel, disp 343}; 344 345def macroop NEG_R 346{ 347 sub reg, t0, reg, flags=(CF,OF,SF,ZF,AF,PF) 348}; 349 350def macroop NEG_M 351{ 352 ldst t1, seg, sib, disp 353 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 354 st t1, seg, sib, disp 355}; 356 357def macroop NEG_P 358{ 359 rdip t7 360 ldst t1, seg, riprel, disp 361 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 362 st t1, seg, riprel, disp 363}; 364''' 365