monitor_mwait.isa revision 11303:f694764d656d
1// Copyright (c) AMD 2// All rights reserved. 3// 4// Authors: Marc Orr 5 6// Monitor Instruction 7 8output header {{ 9 class MonitorInst : public X86ISA::X86StaticInst 10 { 11 public: 12 static const RegIndex foldOBit = 0; 13 /// Constructor 14 MonitorInst(const char *_mnemonic, ExtMachInst _machInst, 15 OpClass __opClass) : 16 X86ISA::X86StaticInst(_mnemonic, _machInst, __opClass) 17 { } 18 19 std::string generateDisassembly(Addr pc, 20 const SymbolTable *symtab) const; 21 }; 22}}; 23 24output decoder {{ 25 std::string MonitorInst::generateDisassembly(Addr PC, 26 const SymbolTable *symtab) const 27 { 28 std::stringstream response; 29 30 printMnemonic(response, mnemonic); 31 ccprintf(response, " "); 32 printReg(response, _srcRegIdx[0], machInst.opSize); 33 return response.str(); 34 } 35}}; 36 37def format MonitorInst(code, *opt_flags) {{ 38 iop = InstObjParams(name, Name, 'MonitorInst', code, opt_flags) 39 header_output = BasicDeclare.subst(iop) 40 decoder_output = BasicConstructor.subst(iop) 41 decode_block = BasicDecode.subst(iop) 42 exec_output = BasicExecute.subst(iop) 43}}; 44 45 46// Mwait instruction 47 48// Declarations for execute() methods. 49def template MwaitExecDeclare {{ 50 Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const; 51 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 52 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, 53 Trace::InstRecord *) const; 54}}; 55 56def template MwaitDeclare {{ 57 class %(class_name)s : public %(base_class)s 58 { 59 public: 60 // Constructor. 61 %(class_name)s(ExtMachInst machInst); 62 %(MwaitExecDeclare)s 63 }; 64}}; 65 66def template MwaitInitiateAcc {{ 67 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc, 68 Trace::InstRecord * traceData) const 69 { 70 unsigned s = 0x8; //size 71 unsigned f = 0; //flags 72 initiateMemRead(xc, traceData, xc->getAddrMonitor()->vAddr, s, f); 73 return NoFault; 74 } 75}}; 76 77def template MwaitCompleteAcc {{ 78 Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT *xc, 79 Trace::InstRecord *traceData) const 80 { 81 MicroHalt hltObj(machInst, mnemonic, 0x0); 82 if(xc->mwait(pkt)) { 83 hltObj.execute(xc, traceData); 84 } 85 return NoFault; 86 } 87}}; 88 89output header {{ 90 class MwaitInst : public X86ISA::X86StaticInst 91 { 92 public: 93 static const RegIndex foldOBit = 0; 94 /// Constructor 95 MwaitInst(const char *_mnemonic, ExtMachInst _machInst, 96 OpClass __opClass) : 97 X86ISA::X86StaticInst(_mnemonic, _machInst, __opClass) 98 { 99 flags[IsMemRef] = 1; 100 flags[IsLoad] = 1; 101 } 102 103 std::string generateDisassembly(Addr pc, 104 const SymbolTable *symtab) const; 105 }; 106}}; 107 108output decoder {{ 109 std::string MwaitInst::generateDisassembly(Addr PC, 110 const SymbolTable *symtab) const 111 { 112 std::stringstream response; 113 114 // Although mwait could take hints from eax and ecx, the _srcRegIdx 115 // is not set, and thus should not be printed here 116 printMnemonic(response, mnemonic); 117 return response.str(); 118 } 119}}; 120 121def format MwaitInst(code, *opt_flags) {{ 122 iop = InstObjParams(name, Name, 'MwaitInst', code, opt_flags) 123 header_output = MwaitDeclare.subst(iop) 124 decoder_output = BasicConstructor.subst(iop) 125 decode_block = BasicDecode.subst(iop) 126 exec_output = BasicExecute.subst(iop) 127 exec_output += MwaitInitiateAcc.subst(iop) 128 exec_output += MwaitCompleteAcc.subst(iop) 129}}; 130 131