intmessage.hh revision 6046
1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_X86_INTMESSAGE_HH__ 32#define __ARCH_X86_INTMESSAGE_HH__ 33 34#include "arch/x86/x86_traits.hh" 35#include "base/bitunion.hh" 36#include "mem/packet.hh" 37#include "mem/packet_access.hh" 38#include "mem/request.hh" 39#include "sim/host.hh" 40 41namespace X86ISA 42{ 43 BitUnion32(TriggerIntMessage) 44 Bitfield<7, 0> destination; 45 Bitfield<15, 8> vector; 46 Bitfield<18, 16> deliveryMode; 47 Bitfield<19> destMode; 48 Bitfield<20> level; 49 Bitfield<21> trigger; 50 EndBitUnion(TriggerIntMessage) 51 52 namespace DeliveryMode 53 { 54 enum IntDeliveryMode { 55 Fixed = 0, 56 LowestPriority = 1, 57 SMI = 2, 58 NMI = 4, 59 INIT = 5, 60 ExtInt = 7, 61 NumModes 62 }; 63 64 static const char * const names[NumModes] = { 65 "Fixed", "LowestPriority", "SMI", "Reserved", 66 "NMI", "INIT", "Reserved", "ExtInt" 67 }; 68 69 static inline bool 70 isReserved(int mode) 71 { 72 return mode == 3 || mode == 6; 73 } 74 } 75 76 static const Addr TriggerIntOffset = 0; 77 78 static inline PacketPtr 79 prepIntRequest(const uint8_t id, Addr offset, Addr size) 80 { 81 RequestPtr req = new Request(x86InterruptAddress(id, offset), 82 size, Request::UNCACHEABLE); 83 PacketPtr pkt = new Packet(req, MemCmd::MessageReq, Packet::Broadcast); 84 pkt->allocate(); 85 return pkt; 86 } 87 88 template<class T> 89 PacketPtr 90 buildIntRequest(const uint8_t id, T payload, Addr offset, Addr size) 91 { 92 PacketPtr pkt = prepIntRequest(id, offset, size); 93 pkt->set<T>(payload); 94 return pkt; 95 } 96 97 static inline PacketPtr 98 buildIntRequest(const uint8_t id, TriggerIntMessage payload) 99 { 100 return buildIntRequest(id, payload, TriggerIntOffset, 101 sizeof(TriggerIntMessage)); 102 } 103 104 static inline PacketPtr 105 buildIntResponse() 106 { 107 panic("buildIntResponse not implemented.\n"); 108 } 109} 110 111#endif 112