static_inst.hh revision 7720:65d338a8dba4 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_INSTS_STATICINST_HH__
41#define __ARCH_X86_INSTS_STATICINST_HH__
42
43#include "base/trace.hh"
44#include "cpu/static_inst.hh"
45
46namespace X86ISA
47{
48    /**
49     * Class for register indices passed to instruction constructors. Using a
50     * wrapper struct for these lets take advantage of the compiler's type
51     * checking.
52     */
53    struct InstRegIndex
54    {
55        RegIndex idx;
56        explicit InstRegIndex(RegIndex _idx) : idx(_idx)
57        {}
58    };
59
60    /**
61     * Base class for all X86 static instructions.
62     */
63
64    class X86StaticInst : public StaticInst
65    {
66      protected:
67        // Constructor.
68        X86StaticInst(const char *mnem,
69             ExtMachInst _machInst, OpClass __opClass)
70                : StaticInst(mnem, _machInst, __opClass)
71            {
72            }
73
74        std::string generateDisassembly(Addr pc,
75            const SymbolTable *symtab) const;
76
77        void printMnemonic(std::ostream &os, const char * mnemonic) const;
78        void printMnemonic(std::ostream &os, const char * instMnemonic,
79                const char * mnemonic) const;
80
81        void printSegment(std::ostream &os, int segment) const;
82
83        void printReg(std::ostream &os, int reg, int size) const;
84        void printSrcReg(std::ostream &os, int reg, int size) const;
85        void printDestReg(std::ostream &os, int reg, int size) const;
86        void printMem(std::ostream &os, uint8_t segment,
87                uint8_t scale, RegIndex index, RegIndex base,
88                uint64_t disp, uint8_t addressSize, bool rip) const;
89
90        inline uint64_t merge(uint64_t into, uint64_t val, int size) const
91        {
92            X86IntReg reg = into;
93            if(_destRegIdx[0] & IntFoldBit)
94            {
95                reg.H = val;
96                return reg;
97            }
98            switch(size)
99            {
100              case 1:
101                reg.L = val;
102                break;
103              case 2:
104                reg.X = val;
105                break;
106              case 4:
107                //XXX Check if this should be zeroed or sign extended
108                reg = 0;
109                reg.E = val;
110                break;
111              case 8:
112                reg.R = val;
113                break;
114              default:
115                panic("Tried to merge with unrecognized size %d.\n", size);
116            }
117            return reg;
118        }
119
120        inline uint64_t pick(uint64_t from, int idx, int size) const
121        {
122            X86IntReg reg = from;
123            DPRINTF(X86, "Picking with size %d\n", size);
124            if(_srcRegIdx[idx] & IntFoldBit)
125                return reg.H;
126            switch(size)
127            {
128              case 1:
129                return reg.L;
130              case 2:
131                return reg.X;
132              case 4:
133                return reg.E;
134              case 8:
135                return reg.R;
136              default:
137                panic("Tried to pick with unrecognized size %d.\n", size);
138            }
139        }
140
141        inline int64_t signedPick(uint64_t from, int idx, int size) const
142        {
143            X86IntReg reg = from;
144            DPRINTF(X86, "Picking with size %d\n", size);
145            if(_srcRegIdx[idx] & IntFoldBit)
146                return reg.SH;
147            switch(size)
148            {
149              case 1:
150                return reg.SL;
151              case 2:
152                return reg.SX;
153              case 4:
154                return reg.SE;
155              case 8:
156                return reg.SR;
157              default:
158                panic("Tried to pick with unrecognized size %d.\n", size);
159            }
160        }
161
162        void
163        advancePC(PCState &pcState) const
164        {
165            pcState.advance();
166        }
167    };
168}
169
170#endif //__ARCH_X86_INSTS_STATICINST_HH__
171