static_inst.hh revision 12106:7784fac1b159 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#ifndef __ARCH_X86_INSTS_STATICINST_HH__
41#define __ARCH_X86_INSTS_STATICINST_HH__
42
43#include "base/trace.hh"
44#include "cpu/static_inst.hh"
45#include "debug/X86.hh"
46
47namespace X86ISA
48{
49    /**
50     * Class for register indices passed to instruction constructors. Using a
51     * wrapper struct for these lets take advantage of the compiler's type
52     * checking.
53     */
54    struct InstRegIndex : public RegId
55    {
56        explicit InstRegIndex(RegIndex _idx) :
57           RegId(computeRegClass(_idx), _idx) {}
58
59      private:
60        // TODO: As X86 register index definition is highly built on the
61        //       unified space concept, it is easier for the moment to rely on
62        //       an helper function to compute the RegClass. It would be nice
63        //       to fix those definition and get rid of this.
64        RegClass computeRegClass(RegIndex _idx) {
65            if (_idx < FP_Reg_Base) {
66                return IntRegClass;
67            } else if (_idx < CC_Reg_Base) {
68                return FloatRegClass;
69            } else if (_idx < Misc_Reg_Base) {
70                return CCRegClass;
71            } else {
72                return MiscRegClass;
73            }
74        }
75    };
76
77    /**
78     * Base class for all X86 static instructions.
79     */
80
81    class X86StaticInst : public StaticInst
82    {
83      protected:
84        // Constructor.
85        X86StaticInst(const char *mnem,
86             ExtMachInst _machInst, OpClass __opClass)
87                : StaticInst(mnem, _machInst, __opClass)
88            {
89            }
90
91        std::string generateDisassembly(Addr pc,
92            const SymbolTable *symtab) const;
93
94        void printMnemonic(std::ostream &os, const char * mnemonic) const;
95        void printMnemonic(std::ostream &os, const char * instMnemonic,
96                const char * mnemonic) const;
97
98        void printSegment(std::ostream &os, int segment) const;
99
100        void printReg(std::ostream &os, RegId reg, int size) const;
101        void printSrcReg(std::ostream &os, int reg, int size) const;
102        void printDestReg(std::ostream &os, int reg, int size) const;
103        void printMem(std::ostream &os, uint8_t segment,
104                uint8_t scale, RegIndex index, RegIndex base,
105                uint64_t disp, uint8_t addressSize, bool rip) const;
106
107        inline uint64_t merge(uint64_t into, uint64_t val, int size) const
108        {
109            X86IntReg reg = into;
110            if (_destRegIdx[0].index() & IntFoldBit)
111            {
112                reg.H = val;
113                return reg;
114            }
115            switch(size)
116            {
117              case 1:
118                reg.L = val;
119                break;
120              case 2:
121                reg.X = val;
122                break;
123              case 4:
124                //XXX Check if this should be zeroed or sign extended
125                reg = 0;
126                reg.E = val;
127                break;
128              case 8:
129                reg.R = val;
130                break;
131              default:
132                panic("Tried to merge with unrecognized size %d.\n", size);
133            }
134            return reg;
135        }
136
137        inline uint64_t pick(uint64_t from, int idx, int size) const
138        {
139            X86IntReg reg = from;
140            DPRINTF(X86, "Picking with size %d\n", size);
141            if (_srcRegIdx[idx].index() & IntFoldBit)
142                return reg.H;
143            switch(size)
144            {
145              case 1:
146                return reg.L;
147              case 2:
148                return reg.X;
149              case 4:
150                return reg.E;
151              case 8:
152                return reg.R;
153              default:
154                panic("Tried to pick with unrecognized size %d.\n", size);
155            }
156        }
157
158        inline int64_t signedPick(uint64_t from, int idx, int size) const
159        {
160            X86IntReg reg = from;
161            DPRINTF(X86, "Picking with size %d\n", size);
162            if (_srcRegIdx[idx].index() & IntFoldBit)
163                return reg.SH;
164            switch(size)
165            {
166              case 1:
167                return reg.SL;
168              case 2:
169                return reg.SX;
170              case 4:
171                return reg.SE;
172              case 8:
173                return reg.SR;
174              default:
175                panic("Tried to pick with unrecognized size %d.\n", size);
176            }
177        }
178
179        void
180        advancePC(PCState &pcState) const
181        {
182            pcState.advance();
183        }
184    };
185}
186
187#endif //__ARCH_X86_INSTS_STATICINST_HH__
188