microregop.cc revision 11321:02e930db812d
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include <string>
41
42#include "arch/x86/insts/microregop.hh"
43#include "arch/x86/regs/misc.hh"
44#include "base/condcodes.hh"
45#include "debug/X86.hh"
46
47namespace X86ISA
48{
49    uint64_t RegOpBase::genFlags(uint64_t oldFlags, uint64_t flagMask,
50            uint64_t _dest, uint64_t _src1, uint64_t _src2,
51            bool subtract) const
52    {
53        DPRINTF(X86, "flagMask = %#x\n", flagMask);
54        uint64_t flags = oldFlags & ~flagMask;
55        if (flagMask & (ECFBit | CFBit))
56        {
57            if (findCarry(dataSize*8, _dest, _src1, _src2))
58                flags |= (flagMask & (ECFBit | CFBit));
59            if (subtract)
60                flags ^= (flagMask & (ECFBit | CFBit));
61        }
62        if (flagMask & PFBit && !findParity(8, _dest))
63            flags |= PFBit;
64        if (flagMask & AFBit)
65        {
66            if (findCarry(4, _dest, _src1, _src2))
67                flags |= AFBit;
68            if (subtract)
69                flags ^= AFBit;
70        }
71        if (flagMask & (EZFBit | ZFBit) && findZero(dataSize*8, _dest))
72            flags |= (flagMask & (EZFBit | ZFBit));
73        if (flagMask & SFBit && findNegative(dataSize*8, _dest))
74            flags |= SFBit;
75        if (flagMask & OFBit && findOverflow(dataSize*8, _dest, _src1, _src2))
76            flags |= OFBit;
77        return flags;
78    }
79
80    std::string RegOp::generateDisassembly(Addr pc,
81            const SymbolTable *symtab) const
82    {
83        std::stringstream response;
84
85        printMnemonic(response, instMnem, mnemonic);
86        printDestReg(response, 0, dataSize);
87        response << ", ";
88        printSrcReg(response, 0, dataSize);
89        response << ", ";
90        printSrcReg(response, 1, dataSize);
91        return response.str();
92    }
93
94    std::string RegOpImm::generateDisassembly(Addr pc,
95            const SymbolTable *symtab) const
96    {
97        std::stringstream response;
98
99        printMnemonic(response, instMnem, mnemonic);
100        printDestReg(response, 0, dataSize);
101        response << ", ";
102        printSrcReg(response, 0, dataSize);
103        ccprintf(response, ", %#x", imm8);
104        return response.str();
105    }
106}
107