faults.cc revision 5858:54f64fb1bd62 
1/*
2 * Copyright (c) 2003-2007 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31/*
32 * Copyright (c) 2007 The Hewlett-Packard Development Company
33 * All rights reserved.
34 *
35 * Redistribution and use of this software in source and binary forms,
36 * with or without modification, are permitted provided that the
37 * following conditions are met:
38 *
39 * The software must be used only for Non-Commercial Use which means any
40 * use which is NOT directed to receiving any direct monetary
41 * compensation for, or commercial advantage from such use.  Illustrative
42 * examples of non-commercial use are academic research, personal study,
43 * teaching, education and corporate research & development.
44 * Illustrative examples of commercial use are distributing products for
45 * commercial advantage and providing services using the software for
46 * commercial advantage.
47 *
48 * If you wish to use this software or functionality therein that may be
49 * covered by patents for commercial use, please contact:
50 *     Director of Intellectual Property Licensing
51 *     Office of Strategy and Technology
52 *     Hewlett-Packard Company
53 *     1501 Page Mill Road
54 *     Palo Alto, California  94304
55 *
56 * Redistributions of source code must retain the above copyright notice,
57 * this list of conditions and the following disclaimer.  Redistributions
58 * in binary form must reproduce the above copyright notice, this list of
59 * conditions and the following disclaimer in the documentation and/or
60 * other materials provided with the distribution.  Neither the name of
61 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
62 * contributors may be used to endorse or promote products derived from
63 * this software without specific prior written permission.  No right of
64 * sublicense is granted herewith.  Derivatives of the software and
65 * output created using the software may be prepared, but only for
66 * Non-Commercial Uses.  Derivatives of the software may be shared with
67 * others provided: (i) the others agree to abide by the list of
68 * conditions herein which includes the Non-Commercial Use restrictions;
69 * and (ii) such Derivatives of the software include the above copyright
70 * notice to acknowledge the contribution from this software where
71 * applicable, this list of conditions and the disclaimer below.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
74 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
75 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
76 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
77 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
78 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
79 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
80 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
81 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
82 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
83 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 *
85 * Authors: Gabe Black
86 */
87
88#include "arch/x86/decoder.hh"
89#include "arch/x86/faults.hh"
90#include "base/trace.hh"
91#include "config/full_system.hh"
92#include "cpu/thread_context.hh"
93#if !FULL_SYSTEM
94#include "arch/x86/isa_traits.hh"
95#include "mem/page_table.hh"
96#include "sim/process.hh"
97#else
98#include "arch/x86/tlb.hh"
99#endif
100
101namespace X86ISA
102{
103#if FULL_SYSTEM
104    void X86FaultBase::invoke(ThreadContext * tc)
105    {
106        using namespace X86ISAInst::RomLabels;
107        HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
108        MicroPC entry;
109        if (m5reg.mode == LongMode) {
110            if (isSoft()) {
111                entry = extern_label_longModeSoftInterrupt;
112            } else {
113                entry = extern_label_longModeInterrupt;
114            }
115        } else {
116            entry = extern_label_legacyModeInterrupt;
117        }
118        tc->setIntReg(INTREG_MICRO(1), vector);
119        tc->setIntReg(INTREG_MICRO(7), tc->readPC());
120        if (errorCode != (uint64_t)(-1)) {
121            if (m5reg.mode == LongMode) {
122                entry = extern_label_longModeInterruptWithError;
123            } else {
124                panic("Legacy mode interrupts with error codes "
125                        "aren't implementde.\n");
126            }
127            // Software interrupts shouldn't have error codes. If one does,
128            // there would need to be microcode to set it up.
129            assert(!isSoft());
130            tc->setIntReg(INTREG_MICRO(15), errorCode);
131        }
132        tc->setMicroPC(romMicroPC(entry));
133        tc->setNextMicroPC(romMicroPC(entry) + 1);
134    }
135
136    void X86Trap::invoke(ThreadContext * tc)
137    {
138        X86FaultBase::invoke(tc);
139        // This is the same as a fault, but it happens -after- the instruction.
140        tc->setPC(tc->readNextPC());
141        tc->setNextPC(tc->readNextNPC());
142        tc->setNextNPC(tc->readNextNPC() + sizeof(MachInst));
143    }
144
145    void X86Abort::invoke(ThreadContext * tc)
146    {
147        panic("Abort exception!");
148    }
149
150    void PageFault::invoke(ThreadContext * tc)
151    {
152        HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG);
153        X86FaultBase::invoke(tc);
154        /*
155         * If something bad happens while trying to enter the page fault
156         * handler, I'm pretty sure that's a double fault and then all bets are
157         * off. That means it should be safe to update this state now.
158         */
159        if (m5reg.mode == LongMode) {
160            tc->setMiscReg(MISCREG_CR2, addr);
161        } else {
162            tc->setMiscReg(MISCREG_CR2, (uint32_t)addr);
163        }
164    }
165
166    void FakeITLBFault::invoke(ThreadContext * tc)
167    {
168        // Start the page table walker.
169        tc->getITBPtr()->walk(tc, vaddr);
170    }
171
172    void FakeDTLBFault::invoke(ThreadContext * tc)
173    {
174        // Start the page table walker.
175        tc->getDTBPtr()->walk(tc, vaddr);
176    }
177
178#else // !FULL_SYSTEM
179    void FakeITLBFault::invoke(ThreadContext * tc)
180    {
181        DPRINTF(TLB, "Invoking an ITLB fault for address %#x at pc %#x.\n",
182                vaddr, tc->readPC());
183        Process *p = tc->getProcessPtr();
184        TlbEntry entry;
185        bool success = p->pTable->lookup(vaddr, entry);
186        if(!success) {
187            panic("Tried to execute unmapped address %#x.\n", vaddr);
188        } else {
189            Addr alignedVaddr = p->pTable->pageAlign(vaddr);
190            DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
191                    entry.pageStart());
192            tc->getITBPtr()->insert(alignedVaddr, entry);
193        }
194    }
195
196    void FakeDTLBFault::invoke(ThreadContext * tc)
197    {
198        DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n",
199                vaddr, tc->readPC());
200        Process *p = tc->getProcessPtr();
201        TlbEntry entry;
202        bool success = p->pTable->lookup(vaddr, entry);
203        if(!success) {
204            p->checkAndAllocNextPage(vaddr);
205            success = p->pTable->lookup(vaddr, entry);
206        }
207        if(!success) {
208            panic("Tried to access unmapped address %#x.\n", vaddr);
209        } else {
210            Addr alignedVaddr = p->pTable->pageAlign(vaddr);
211            DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr,
212                    entry.pageStart());
213            tc->getDTBPtr()->insert(alignedVaddr, entry);
214        }
215    }
216#endif
217} // namespace X86ISA
218
219