emulenv.cc revision 7087 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include <cassert>
41
42#include "arch/x86/emulenv.hh"
43#include "base/misc.hh"
44
45using namespace X86ISA;
46
47void EmulEnv::doModRM(const ExtMachInst & machInst)
48{
49    assert(machInst.modRM.mod != 3);
50    //Use the SIB byte for addressing if the modrm byte calls for it.
51    if (machInst.modRM.rm == 4 && machInst.addrSize != 2) {
52        scale = 1 << machInst.sib.scale;
53        index = machInst.sib.index | (machInst.rex.x << 3);
54        base = machInst.sib.base | (machInst.rex.b << 3);
55        //In this special case, we don't use a base. The displacement also
56        //changes, but that's managed by the predecoder.
57        if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0)
58            base = NUM_INTREGS;
59        //In -this- special case, we don't use an index.
60        if (index == INTREG_RSP)
61            index = NUM_INTREGS;
62    } else {
63        if (machInst.addrSize == 2) {
64            unsigned rm = machInst.modRM.rm;
65            if (rm <= 3) {
66                scale = 1;
67                if (rm < 2) {
68                    base = INTREG_RBX;
69                } else {
70                    base = INTREG_RBP;
71                }
72                index = (rm % 2) ? INTREG_RDI : INTREG_RSI;
73            } else {
74                scale = 0;
75                switch (rm) {
76                  case 4:
77                    base = INTREG_RSI;
78                    break;
79                  case 5:
80                    base = INTREG_RDI;
81                    break;
82                  case 6:
83                    base = INTREG_RBP;
84                    break;
85                  case 7:
86                    base = INTREG_RBX;
87                    break;
88                }
89            }
90        } else {
91            scale = 0;
92            base = machInst.modRM.rm | (machInst.rex.b << 3);
93            if (machInst.modRM.mod == 0 && machInst.modRM.rm == 5) {
94                //Since we need to use a different encoding of this
95                //instruction anyway, just ignore the base in those cases
96                base = NUM_INTREGS;
97            }
98        }
99    }
100    //Figure out what segment to use. This won't be entirely accurate since
101    //the presence of a displacement is supposed to make the instruction
102    //default to the data segment.
103    if ((base != INTREG_RBP && base != INTREG_RSP) || machInst.dispSize) {
104        seg = SEGMENT_REG_DS;
105        //Handle any segment override that might have been in the instruction
106        int segFromInst = machInst.legacy.seg;
107        if (segFromInst)
108            seg = (SegmentRegIndex)(segFromInst - 1);
109    } else {
110        seg = SEGMENT_REG_SS;
111    }
112}
113
114void EmulEnv::setSeg(const ExtMachInst & machInst)
115{
116    seg = SEGMENT_REG_DS;
117    //Handle any segment override that might have been in the instruction
118    int segFromInst = machInst.legacy.seg;
119    if (segFromInst)
120        seg = (SegmentRegIndex)(segFromInst - 1);
121}
122