system.hh revision 3584
12567SN/A/*
22567SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32567SN/A * All rights reserved.
42567SN/A *
52567SN/A * Redistribution and use in source and binary forms, with or without
62567SN/A * modification, are permitted provided that the following conditions are
72567SN/A * met: redistributions of source code must retain the above copyright
82567SN/A * notice, this list of conditions and the following disclaimer;
92567SN/A * redistributions in binary form must reproduce the above copyright
102567SN/A * notice, this list of conditions and the following disclaimer in the
112567SN/A * documentation and/or other materials provided with the distribution;
122567SN/A * neither the name of the copyright holders nor the names of its
132567SN/A * contributors may be used to endorse or promote products derived from
142567SN/A * this software without specific prior written permission.
152567SN/A *
162567SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172567SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182567SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192567SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202567SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212567SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222567SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232567SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242567SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252567SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262567SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi
292567SN/A */
302567SN/A
312567SN/A#ifndef __ARCH_SPARC_SYSTEM_HH__
322567SN/A#define __ARCH_SPARC_SYSTEM_HH__
332567SN/A
342567SN/A#include <string>
352567SN/A#include <vector>
362567SN/A
372567SN/A#include "base/loader/symtab.hh"
382567SN/A#include "cpu/pc_event.hh"
392567SN/A#include "kern/system_events.hh"
402567SN/A#include "sim/sim_object.hh"
412567SN/A#include "sim/system.hh"
422567SN/A
432567SN/Aclass SparcSystem : public System
442567SN/A{
452567SN/A  public:
462567SN/A    struct Params : public System::Params
472567SN/A    {
483584Ssaidi@eecs.umich.edu        PhysicalMemory *rom;
493584Ssaidi@eecs.umich.edu        Addr reset_addr;
503584Ssaidi@eecs.umich.edu        Addr hypervisor_addr;
513584Ssaidi@eecs.umich.edu        Addr openboot_addr;
522567SN/A        std::string reset_bin;
533527Sgblack@eecs.umich.edu        std::string hypervisor_bin;
542567SN/A        std::string openboot_bin;
552567SN/A        std::string boot_osflags;
562567SN/A    };
572567SN/A
582567SN/A    SparcSystem(Params *p);
592567SN/A
602650Ssaidi@eecs.umich.edu    ~SparcSystem();
612567SN/A
622567SN/A    virtual bool breakpoint();
632567SN/A
642567SN/A/**
652567SN/A * Serialization stuff
662567SN/A */
672567SN/A  public:
682567SN/A    virtual void serialize(std::ostream &os);
692567SN/A    virtual void unserialize(Checkpoint *cp, const std::string &section);
702567SN/A
712567SN/A    /** reset binary symbol table */
722567SN/A    SymbolTable *resetSymtab;
732567SN/A
742567SN/A    /** hypervison binary symbol table */
752567SN/A    SymbolTable *hypervisorSymtab;
762567SN/A
772567SN/A    /** openboot symbol table */
782567SN/A    SymbolTable *openbootSymtab;
792567SN/A
802567SN/A    /** Object pointer for the reset binary */
812567SN/A    ObjectFile *reset;
822567SN/A
832567SN/A    /** Object pointer for the hypervisor code */
842567SN/A    ObjectFile *hypervisor;
852567SN/A
862567SN/A    /** Object pointer for the openboot code */
872567SN/A    ObjectFile *openboot;
882567SN/A
892650Ssaidi@eecs.umich.edu    /** System Tick for syncronized tick across all cpus. */
902650Ssaidi@eecs.umich.edu    Tick sysTick;
912650Ssaidi@eecs.umich.edu
923584Ssaidi@eecs.umich.edu    /** functional port to ROM */
933584Ssaidi@eecs.umich.edu    FunctionalPort funcRomPort;
943584Ssaidi@eecs.umich.edu
952567SN/A  protected:
962567SN/A    const Params *params() const { return (const Params *)_params; }
972567SN/A
982567SN/A    /** Add a function-based event to reset binary. */
992567SN/A    template <class T>
1002567SN/A    T *SparcSystem::addResetFuncEvent(const char *lbl)
1012567SN/A    {
1022567SN/A        return addFuncEvent<T>(resetSymtab, lbl);
1032567SN/A    }
1042567SN/A
1052567SN/A    /** Add a function-based event to the hypervisor. */
1062567SN/A    template <class T>
1072567SN/A    T *SparcSystem::addHypervisorFuncEvent(const char *lbl)
1082567SN/A    {
1092567SN/A        return addFuncEvent<T>(hypervisorSymtab, lbl);
1102567SN/A    }
1112567SN/A
1122567SN/A    /** Add a function-based event to the openboot. */
1132567SN/A    template <class T>
1142567SN/A    T *SparcSystem::addOpenbootFuncEvent(const char *lbl)
1152567SN/A    {
1162567SN/A        return addFuncEvent<T>(openbootSymtab, lbl);
1172567SN/A    }
1182567SN/A
1193553Sgblack@eecs.umich.edu    virtual Addr fixFuncEventAddr(Addr addr)
1203553Sgblack@eecs.umich.edu    {
1213553Sgblack@eecs.umich.edu        //XXX This may eventually have to do something useful.
1223553Sgblack@eecs.umich.edu        return addr;
1233553Sgblack@eecs.umich.edu    }
1242567SN/A};
1252567SN/A
1262567SN/A#endif
1272567SN/A
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