trap.isa revision 2632:1bb2f91485ea
12623SN/A// Copyright (c) 2006 The Regents of The University of Michigan 22623SN/A// All rights reserved. 32623SN/A// 42623SN/A// Redistribution and use in source and binary forms, with or without 52623SN/A// modification, are permitted provided that the following conditions are 62623SN/A// met: redistributions of source code must retain the above copyright 72623SN/A// notice, this list of conditions and the following disclaimer; 82623SN/A// redistributions in binary form must reproduce the above copyright 92623SN/A// notice, this list of conditions and the following disclaimer in the 102623SN/A// documentation and/or other materials provided with the distribution; 112623SN/A// neither the name of the copyright holders nor the names of its 122623SN/A// contributors may be used to endorse or promote products derived from 132623SN/A// this software without specific prior written permission. 142623SN/A// 152623SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162623SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172623SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182623SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192623SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202623SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212623SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222623SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232623SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242623SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252623SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262623SN/A// 272665Ssaidi@eecs.umich.edu// Authors: Gabe Black 282665Ssaidi@eecs.umich.edu// Steve Reinhardt 292623SN/A 302623SN/A//////////////////////////////////////////////////////////////////// 312623SN/A// 322623SN/A// Trap instructions 332623SN/A// 342623SN/A 352623SN/Aoutput header {{ 362623SN/A /** 372623SN/A * Base class for trap instructions, 382623SN/A * or instructions that always fault. 392623SN/A */ 402623SN/A class Trap : public SparcStaticInst 412623SN/A { 422623SN/A protected: 432623SN/A 442623SN/A // Constructor 452623SN/A Trap(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 462623SN/A SparcStaticInst(mnem, _machInst, __opClass), trapNum(SW_TRAP) 472623SN/A { 482623SN/A } 492623SN/A 502623SN/A std::string generateDisassembly(Addr pc, 512623SN/A const SymbolTable *symtab) const; 522623SN/A 532623SN/A int trapNum; 542623SN/A }; 552623SN/A}}; 562623SN/A 572623SN/Aoutput decoder {{ 582623SN/A std::string Trap::generateDisassembly(Addr pc, 592623SN/A const SymbolTable *symtab) const 602623SN/A { 612623SN/A std::stringstream response; 622623SN/A 632623SN/A printMnemonic(response, mnemonic); 642623SN/A ccprintf(response, " "); 652623SN/A printReg(response, _srcRegIdx[0]); 662623SN/A ccprintf(response, ", 0x%x", trapNum); 672623SN/A ccprintf(response, ", or "); 682623SN/A printReg(response, _srcRegIdx[1]); 692623SN/A return response.str(); 702623SN/A } 712623SN/A}}; 722623SN/A 732680Sktlim@umich.edudef template TrapExecute {{ 742680Sktlim@umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 752623SN/A Trace::InstRecord *traceData) const 762623SN/A { 772680Sktlim@umich.edu Fault fault = NoFault; 782623SN/A %(op_decl)s; 792623SN/A %(op_rd)s; 802623SN/A %(code)s 812623SN/A return fault; 822623SN/A } 832630SN/A}}; 842623SN/A 852623SN/Adef format Trap(code, *opt_flags) {{ 862623SN/A orig_code = code 872623SN/A cblk = CodeBlock(code) 882623SN/A iop = InstObjParams(name, Name, 'Trap', cblk, opt_flags) 892623SN/A header_output = BasicDeclare.subst(iop) 902630SN/A decoder_output = BasicConstructor.subst(iop) 912623SN/A decode_block = BasicDecode.subst(iop) 922623SN/A exec_output = TrapExecute.subst(iop) 932623SN/A}}; 942623SN/A