util.isa revision 3792:dae368e56d0e 
1// Copyright (c) 2006 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28//          Gabe Black
29//          Steve Reinhardt
30
31////////////////////////////////////////////////////////////////////
32//
33// Mem utility templates and functions
34//
35
36output header {{
37        /**
38         * Base class for memory operations.
39         */
40        class Mem : public SparcStaticInst
41        {
42          protected:
43
44            // Constructor
45            Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
46                SparcStaticInst(mnem, _machInst, __opClass)
47            {
48            }
49
50            std::string generateDisassembly(Addr pc,
51                    const SymbolTable *symtab) const;
52        };
53
54        /**
55         * Class for memory operations which use an immediate offset.
56         */
57        class MemImm : public Mem
58        {
59          protected:
60
61            // Constructor
62            MemImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
63                Mem(mnem, _machInst, __opClass), imm(sext<13>(SIMM13))
64            {}
65
66            std::string generateDisassembly(Addr pc,
67                    const SymbolTable *symtab) const;
68
69            const int32_t imm;
70        };
71}};
72
73output decoder {{
74        std::string Mem::generateDisassembly(Addr pc,
75                const SymbolTable *symtab) const
76        {
77            std::stringstream response;
78            bool load = flags[IsLoad];
79            bool store = flags[IsStore];
80
81            printMnemonic(response, mnemonic);
82            if(store)
83            {
84                printReg(response, _srcRegIdx[0]);
85                ccprintf(response, ", ");
86            }
87            ccprintf(response, "[");
88            if(_srcRegIdx[!store ? 0 : 1] != 0)
89            {
90                printSrcReg(response, !store ? 0 : 1);
91                ccprintf(response, " + ");
92            }
93            printSrcReg(response, !store ? 1 : 2);
94            ccprintf(response, "]");
95            if(load)
96            {
97                ccprintf(response, ", ");
98                printReg(response, _destRegIdx[0]);
99            }
100
101            return response.str();
102        }
103
104        std::string MemImm::generateDisassembly(Addr pc,
105                const SymbolTable *symtab) const
106        {
107            std::stringstream response;
108            bool load = flags[IsLoad];
109            bool save = flags[IsStore];
110
111            printMnemonic(response, mnemonic);
112            if(save)
113            {
114                printReg(response, _srcRegIdx[0]);
115                ccprintf(response, ", ");
116            }
117            ccprintf(response, "[");
118            if(_srcRegIdx[!save ? 0 : 1] != 0)
119            {
120                printReg(response, _srcRegIdx[!save ? 0 : 1]);
121                ccprintf(response, " + ");
122            }
123            if(imm >= 0)
124                ccprintf(response, "0x%x]", imm);
125            else
126                ccprintf(response, "-0x%x]", -imm);
127            if(load)
128            {
129                ccprintf(response, ", ");
130                printReg(response, _destRegIdx[0]);
131            }
132
133            return response.str();
134        }
135}};
136
137//This template provides the execute functions for a load
138def template LoadExecute {{
139        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
140                Trace::InstRecord *traceData) const
141        {
142            Fault fault = NoFault;
143            Addr EA;
144            %(op_decl)s;
145            %(op_rd)s;
146            %(ea_code)s;
147            DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
148            %(fault_check)s;
149            if(fault == NoFault)
150            {
151                fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, 0);
152            }
153            if(fault == NoFault)
154            {
155                %(code)s;
156            }
157            if(fault == NoFault)
158            {
159                    //Write the resulting state to the execution context
160                    %(op_wb)s;
161            }
162
163            return fault;
164        }
165}};
166
167def template LoadInitiateAcc {{
168        Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
169                Trace::InstRecord * traceData) const
170        {
171            Fault fault = NoFault;
172            Addr EA;
173            uint%(mem_acc_size)s_t Mem;
174            %(op_decl)s;
175            %(op_rd)s;
176            %(ea_code)s;
177            DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
178            %(fault_check)s;
179            if(fault == NoFault)
180            {
181                fault = xc->read(EA, (uint%(mem_acc_size)s_t&)Mem, 0);
182            }
183            return fault;
184        }
185}};
186
187def template LoadCompleteAcc {{
188        Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc,
189                Trace::InstRecord * traceData) const
190        {
191            Fault fault = NoFault;
192            %(op_decl)s;
193            %(op_rd)s;
194            Mem = pkt->get<typeof(Mem)>();
195            %(code)s;
196            if(fault == NoFault)
197            {
198                %(op_wb)s;
199            }
200            return fault;
201        }
202}};
203
204//This template provides the execute functions for a store
205def template StoreExecute {{
206        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
207                Trace::InstRecord *traceData) const
208        {
209            Fault fault = NoFault;
210            //This is to support the conditional store in cas instructions.
211            //It should be optomized out in all the others
212            bool storeCond = true;
213            Addr EA;
214            %(op_decl)s;
215            %(op_rd)s;
216            %(ea_code)s;
217            DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
218            %(fault_check)s;
219            if(fault == NoFault)
220            {
221                %(code)s;
222            }
223            if(storeCond && fault == NoFault)
224            {
225                fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, 0);
226            }
227            if(fault == NoFault)
228            {
229                    //Write the resulting state to the execution context
230                    %(op_wb)s;
231            }
232
233            return fault;
234        }
235}};
236
237def template StoreInitiateAcc {{
238        Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc,
239                Trace::InstRecord * traceData) const
240        {
241            Fault fault = NoFault;
242            bool storeCond = true;
243            Addr EA;
244            %(op_decl)s;
245            %(op_rd)s;
246            %(ea_code)s;
247            DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA);
248            %(fault_check)s;
249            if(fault == NoFault)
250            {
251                %(code)s;
252            }
253            if(storeCond && fault == NoFault)
254            {
255                fault = xc->write((uint%(mem_acc_size)s_t)Mem, EA, 0, 0);
256            }
257            if(fault == NoFault)
258            {
259                    //Write the resulting state to the execution context
260                %(op_wb)s;
261            }
262            return fault;
263        }
264}};
265
266def template StoreCompleteAcc {{
267        Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
268                Trace::InstRecord * traceData) const
269        {
270            return NoFault;
271        }
272}};
273
274//This delcares the initiateAcc function in memory operations
275def template InitiateAccDeclare {{
276    Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
277}};
278
279//This declares the completeAcc function in memory operations
280def template CompleteAccDeclare {{
281    Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const;
282}};
283
284//Here are some code snippets which check for various fault conditions
285let {{
286    LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc]
287    StoreFuncs = [StoreExecute, StoreInitiateAcc, StoreCompleteAcc]
288    # The LSB can be zero, since it's really the MSB in doubles and quads
289    # and we're dealing with doubles
290    BlockAlignmentFaultCheck = '''
291        if(RD & 0xe)
292            fault = new IllegalInstruction;
293        else if(EA & 0x3f)
294            fault = new MemAddressNotAligned;
295    '''
296    # XXX Need to take care of pstate.hpriv as well. The lower ASIs
297    # are split into ones that are available in priv and hpriv, and
298    # those that are only available in hpriv
299    AlternateASIPrivFaultCheck = '''
300        if(bits(Pstate,2,2) == 0 && (EXT_ASI & 0x80) == 0)
301            fault = new PrivilegedAction;
302        else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2))
303            fault = new PrivilegedAction;
304    '''
305
306}};
307
308//A simple function to generate the name of the macro op of a certain
309//instruction at a certain micropc
310let {{
311    def makeMicroName(name, microPc):
312            return name + "::" + name + "_" + str(microPc)
313}};
314
315//This function properly generates the execute functions for one of the
316//templates above. This is needed because in one case, ea computation,
317//fault checks and the actual code all occur in the same function,
318//and in the other they're distributed across two. Also note that for
319//execute functions, the name of the base class doesn't matter.
320let {{
321    def doSplitExecute(execute, name, Name, opt_flags, microParam):
322        iop = InstObjParams(name, Name, '', microParam, opt_flags)
323        (execf, initf, compf) = execute
324        return execf.subst(iop) + initf.subst(iop) + compf.subst(iop)
325
326
327    def doDualSplitExecute(code, eaRegCode, eaImmCode, execute,
328            faultCode, nameReg, nameImm, NameReg, NameImm, opt_flags):
329        executeCode = ''
330        for (eaCode, name, Name) in (
331                (eaRegCode, nameReg, NameReg),
332                (eaImmCode, nameImm, NameImm)):
333            microParams = {"code": code, "ea_code": eaCode,
334                "fault_check": faultCode}
335            executeCode += doSplitExecute(execute, name, Name,
336                    opt_flags, microParams)
337        return executeCode
338}};
339