mem.isa revision 2022
12391SN/A////////////////////////////////////////////////////////////////////
212218Snikos.nikoleris@arm.com//
37733SN/A// Mem instructions
47733SN/A//
57733SN/A
67733SN/Aoutput header {{
77733SN/A        /**
87733SN/A         * Base class for integer operations.
97733SN/A         */
107733SN/A        class Mem : public SparcStaticInst
117733SN/A        {
127733SN/A                protected:
137733SN/A
142391SN/A                /// Constructor
152391SN/A                Mem(const char *mnem, MachInst _machInst, OpClass __opClass) : SparcStaticInst(mnem, _machInst, __opClass)
162391SN/A                {
172391SN/A                }
182391SN/A
192391SN/A                std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
202391SN/A        };
212391SN/A}};
222391SN/A
232391SN/Aoutput decoder {{
242391SN/A        std::string Mem::generateDisassembly(Addr pc, const SymbolTable *symtab) const
252391SN/A        {
262391SN/A                return "Disassembly of integer instruction\n";
272391SN/A        }
282391SN/A}};
292391SN/A
302391SN/Adef template MemExecute {{
312391SN/A        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
322391SN/A        {
332391SN/A                //Attempt to execute the instruction
342391SN/A                try
352391SN/A                {
362391SN/A
372391SN/A                        %(op_decl)s;
382391SN/A                        %(op_rd)s;
392665SN/A                        ea_code
402665SN/A                        %(code)s;
412914SN/A                }
428931Sandreas.hansson@arm.com                //If we have an exception for some reason,
432391SN/A                //deal with it
442391SN/A                catch(SparcException except)
4511793Sbrandon.potter@amd.com                {
4611793Sbrandon.potter@amd.com                        //Deal with exception
4710466Sandreas.hansson@arm.com                        return No_Fault;
4810466Sandreas.hansson@arm.com                }
4912218Snikos.nikoleris@arm.com
5010102Sali.saidi@arm.com                //Write the resulting state to the execution context
5110102Sali.saidi@arm.com                %(op_wb)s;
528232SN/A
538232SN/A                return No_Fault;
543879SN/A        }
559053Sdam.sunwoo@arm.com}};
562394SN/A
572391SN/A// Primary format for integer operate instructions:
582391SN/Adef format Mem(code, *opt_flags) {{
598931Sandreas.hansson@arm.com        orig_code = code
608931Sandreas.hansson@arm.com        cblk = CodeBlock(code)
619053Sdam.sunwoo@arm.com        iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
6211614Sdavid.j.hashe@gmail.com        header_output = BasicDeclare.subst(iop)
632391SN/A        decoder_output = BasicConstructor.subst(iop)
6410466Sandreas.hansson@arm.com        decode_block = BasicDecodeWithMnemonic.subst(iop)
6510466Sandreas.hansson@arm.com        exec_output = MemExecute.subst(iop)
6610466Sandreas.hansson@arm.com        exec_output.replace('ea_code', 'EA = I ? (R1 + SIMM13) : R1 + R2;');
6710466Sandreas.hansson@arm.com}};
6810466Sandreas.hansson@arm.com
6910466Sandreas.hansson@arm.comdef format Cas(code, *opt_flags) {{
7010466Sandreas.hansson@arm.com        orig_code = code
7110466Sandreas.hansson@arm.com        cblk = CodeBlock(code)
722391SN/A        iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
732391SN/A        header_output = BasicDeclare.subst(iop)
742391SN/A        decoder_output = BasicConstructor.subst(iop)
759293Sandreas.hansson@arm.com        decode_block = BasicDecodeWithMnemonic.subst(iop)
769293Sandreas.hansson@arm.com        exec_output = MemExecute.subst(iop)
772391SN/A        exec_output.replace('ea_code', 'EA = R1;');
789293Sandreas.hansson@arm.com}};
792391SN/A