blockmem.isa revision 10184:bbfa3152bdea 
1// Copyright (c) 2006-2007 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright
9// notice, this list of conditions and the following disclaimer in the
10// documentation and/or other materials provided with the distribution;
11// neither the name of the copyright holders nor the names of its
12// contributors may be used to endorse or promote products derived from
13// this software without specific prior written permission.
14//
15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26//
27// Authors: Ali Saidi
28//          Gabe Black
29
30////////////////////////////////////////////////////////////////////
31//
32// Block Memory instructions
33//
34
35output header {{
36
37        class BlockMem : public SparcMacroInst
38        {
39          protected:
40
41            // Constructor
42            // We make the assumption that all block memory operations
43            // Will take 8 instructions to execute
44            BlockMem(const char *mnem, ExtMachInst _machInst) :
45                SparcMacroInst(mnem, _machInst, No_OpClass, 8)
46            {}
47        };
48
49        class BlockMemImm : public BlockMem
50        {
51          protected:
52
53            // Constructor
54            BlockMemImm(const char *mnem, ExtMachInst _machInst) :
55                BlockMem(mnem, _machInst)
56            {}
57        };
58
59        class BlockMemMicro : public SparcMicroInst
60        {
61          protected:
62
63            // Constructor
64            BlockMemMicro(const char *mnem, ExtMachInst _machInst,
65                    OpClass __opClass, int8_t _offset) :
66                SparcMicroInst(mnem, _machInst, __opClass),
67                offset(_offset)
68            {}
69
70            std::string generateDisassembly(Addr pc,
71                const SymbolTable *symtab) const;
72
73            const int8_t offset;
74        };
75
76        class BlockMemImmMicro : public BlockMemMicro
77        {
78          protected:
79
80            // Constructor
81            BlockMemImmMicro(const char *mnem, ExtMachInst _machInst,
82                    OpClass __opClass, int8_t _offset) :
83                BlockMemMicro(mnem, _machInst, __opClass, _offset),
84                imm(sext<13>(SIMM13))
85            {}
86
87            std::string generateDisassembly(Addr pc,
88                const SymbolTable *symtab) const;
89
90            const int32_t imm;
91        };
92}};
93
94output decoder {{
95        std::string BlockMemMicro::generateDisassembly(Addr pc,
96                const SymbolTable *symtab) const
97        {
98            std::stringstream response;
99            bool load = flags[IsLoad];
100            bool save = flags[IsStore];
101
102            printMnemonic(response, mnemonic);
103            if (save) {
104                printReg(response, _srcRegIdx[0]);
105                ccprintf(response, ", ");
106            }
107            ccprintf(response, "[ ");
108            printReg(response, _srcRegIdx[!save ? 0 : 1]);
109            ccprintf(response, " + ");
110            printReg(response, _srcRegIdx[!save ? 1 : 2]);
111            ccprintf(response, " ]");
112            if (load) {
113                ccprintf(response, ", ");
114                printReg(response, _destRegIdx[0]);
115            }
116
117            return response.str();
118        }
119
120        std::string BlockMemImmMicro::generateDisassembly(Addr pc,
121                const SymbolTable *symtab) const
122        {
123            std::stringstream response;
124            bool load = flags[IsLoad];
125            bool save = flags[IsStore];
126
127            printMnemonic(response, mnemonic);
128            if (save) {
129                printReg(response, _srcRegIdx[1]);
130                ccprintf(response, ", ");
131            }
132            ccprintf(response, "[ ");
133            printReg(response, _srcRegIdx[0]);
134            if (imm >= 0)
135                ccprintf(response, " + 0x%x ]", imm);
136            else
137                ccprintf(response, " + -0x%x ]", -imm);
138            if (load) {
139                ccprintf(response, ", ");
140                printReg(response, _destRegIdx[0]);
141            }
142
143            return response.str();
144        }
145
146}};
147
148def template BlockMemDeclare {{
149        /**
150         * Static instruction class for a block memory operation
151         */
152        class %(class_name)s : public %(base_class)s
153        {
154          public:
155            // Constructor
156            %(class_name)s(ExtMachInst machInst);
157
158          protected:
159            class %(class_name)s_0 : public %(base_class)sMicro
160            {
161              public:
162                // Constructor
163                %(class_name)s_0(ExtMachInst machInst);
164                %(BasicExecDeclare)s
165                %(InitiateAccDeclare)s
166                %(CompleteAccDeclare)s
167            };
168
169            class %(class_name)s_1 : public %(base_class)sMicro
170            {
171              public:
172                // Constructor
173                %(class_name)s_1(ExtMachInst machInst);
174                %(BasicExecDeclare)s
175                %(InitiateAccDeclare)s
176                %(CompleteAccDeclare)s
177            };
178
179            class %(class_name)s_2 : public %(base_class)sMicro
180            {
181              public:
182                // Constructor
183                %(class_name)s_2(ExtMachInst machInst);
184                %(BasicExecDeclare)s
185                %(InitiateAccDeclare)s
186                %(CompleteAccDeclare)s
187            };
188
189            class %(class_name)s_3 : public %(base_class)sMicro
190            {
191              public:
192                // Constructor
193                %(class_name)s_3(ExtMachInst machInst);
194                %(BasicExecDeclare)s
195                %(InitiateAccDeclare)s
196                %(CompleteAccDeclare)s
197            };
198
199            class %(class_name)s_4 : public %(base_class)sMicro
200            {
201              public:
202                // Constructor
203                %(class_name)s_4(ExtMachInst machInst);
204                %(BasicExecDeclare)s
205                %(InitiateAccDeclare)s
206                %(CompleteAccDeclare)s
207            };
208
209            class %(class_name)s_5 : public %(base_class)sMicro
210            {
211              public:
212                // Constructor
213                %(class_name)s_5(ExtMachInst machInst);
214                %(BasicExecDeclare)s
215                %(InitiateAccDeclare)s
216                %(CompleteAccDeclare)s
217            };
218
219            class %(class_name)s_6 : public %(base_class)sMicro
220            {
221              public:
222                // Constructor
223                %(class_name)s_6(ExtMachInst machInst);
224                %(BasicExecDeclare)s
225                %(InitiateAccDeclare)s
226                %(CompleteAccDeclare)s
227            };
228
229            class %(class_name)s_7 : public %(base_class)sMicro
230            {
231              public:
232                // Constructor
233                %(class_name)s_7(ExtMachInst machInst);
234                %(BasicExecDeclare)s
235                %(InitiateAccDeclare)s
236                %(CompleteAccDeclare)s
237            };
238        };
239}};
240
241// Basic instruction class constructor template.
242def template BlockMemConstructor {{
243        %(class_name)s::%(class_name)s(ExtMachInst machInst)
244            : %(base_class)s("%(mnemonic)s", machInst)
245        {
246            %(constructor)s;
247            microops[0] = new %(class_name)s_0(machInst);
248            microops[1] = new %(class_name)s_1(machInst);
249            microops[2] = new %(class_name)s_2(machInst);
250            microops[3] = new %(class_name)s_3(machInst);
251            microops[4] = new %(class_name)s_4(machInst);
252            microops[5] = new %(class_name)s_5(machInst);
253            microops[6] = new %(class_name)s_6(machInst);
254            microops[7] = new %(class_name)s_7(machInst);
255        }
256}};
257
258def template BlockMemMicroConstructor {{
259        %(class_name)s::
260            %(class_name)s_%(micro_pc)s::
261            %(class_name)s_%(micro_pc)s(ExtMachInst machInst) :
262                %(base_class)sMicro("%(mnemonic)s[%(micro_pc)s]",
263                        machInst, %(op_class)s, %(micro_pc)s * 8)
264    {
265        %(constructor)s;
266        %(set_flags)s;
267    }
268}};
269
270let {{
271
272    def doBlockMemFormat(code, faultCode, execute, name, Name, opt_flags):
273        # XXX Need to take care of pstate.hpriv as well. The lower ASIs
274        # are split into ones that are available in priv and hpriv, and
275        # those that are only available in hpriv
276        addrCalcReg = 'EA = Rs1 + Rs2 + offset;'
277        addrCalcImm = 'EA = Rs1 + imm + offset;'
278        iop = InstObjParams(name, Name, 'BlockMem', code, opt_flags)
279        iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm', code, opt_flags)
280        header_output = BlockMemDeclare.subst(iop) + BlockMemDeclare.subst(iop_imm)
281        decoder_output = BlockMemConstructor.subst(iop) + BlockMemConstructor.subst(iop_imm)
282        decode_block = ROrImmDecode.subst(iop)
283        matcher = re.compile(r'Frd_N')
284        exec_output = ''
285        for microPc in range(8):
286            flag_code = ''
287            if (microPc == 7):
288                flag_code = "flags[IsLastMicroop] = true;"
289            elif (microPc == 0):
290                flag_code = "flags[IsDelayedCommit] = true; flags[IsFirstMicroop] = true;"
291            else:
292                flag_code = "flags[IsDelayedCommit] = true;"
293            pcedCode = matcher.sub("Frd_%d" % microPc, code)
294            iop = InstObjParams(name, Name, 'BlockMem',
295                    {"code": pcedCode, "ea_code": addrCalcReg,
296                    "fault_check": faultCode, "micro_pc": microPc,
297                    "set_flags": flag_code, "EA_trunc" : TruncateEA},
298                    opt_flags)
299            iop_imm = InstObjParams(name, Name + 'Imm', 'BlockMemImm',
300                    {"code": pcedCode, "ea_code": addrCalcImm,
301                    "fault_check": faultCode, "micro_pc": microPc,
302                    "set_flags": flag_code, "EA_trunc" : TruncateEA},
303                    opt_flags)
304            decoder_output += BlockMemMicroConstructor.subst(iop)
305            decoder_output += BlockMemMicroConstructor.subst(iop_imm)
306            exec_output += doDualSplitExecute(
307                    pcedCode, '', addrCalcReg, addrCalcImm, execute, faultCode,
308                    makeMicroName(name, microPc),
309                    makeMicroName(name + "Imm", microPc),
310                    makeMicroName(Name, microPc),
311                    makeMicroName(Name + "Imm", microPc),
312                    "EXT_ASI", opt_flags);
313            faultCode = ''
314        return (header_output, decoder_output, exec_output, decode_block)
315}};
316
317def format BlockLoad(code, *opt_flags) {{
318        code = filterDoubles(code)
319        # We need to make sure to check the highest priority fault last.
320        # That way, if other faults have been detected, they'll be overwritten
321        # rather than the other way around.
322        faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
323        (header_output,
324         decoder_output,
325         exec_output,
326         decode_block) = doBlockMemFormat(code, faultCode,
327             LoadFuncs, name, Name, opt_flags)
328}};
329
330def format BlockStore(code, *opt_flags) {{
331        code = filterDoubles(code)
332        # We need to make sure to check the highest priority fault last.
333        # That way, if other faults have been detected, they'll be overwritten
334        # rather than the other way around.
335        faultCode = AlternateASIPrivFaultCheck + BlockAlignmentFaultCheck
336        (header_output,
337         decoder_output,
338         exec_output,
339         decode_block) = doBlockMemFormat(code, faultCode,
340             StoreFuncs, name, Name, opt_flags)
341}};
342