basicmem.isa revision 8342:77d12d8f7971 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006-2007 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Ali Saidi
30//          Gabe Black
31
32////////////////////////////////////////////////////////////////////
33//
34// Mem instructions
35//
36
37def template MemDeclare {{
38        /**
39         * Static instruction class for "%(mnemonic)s".
40         */
41        class %(class_name)s : public %(base_class)s
42        {
43          public:
44
45            /// Constructor.
46            %(class_name)s(ExtMachInst machInst);
47
48            %(BasicExecDeclare)s
49
50            %(EACompDeclare)s
51
52            %(InitiateAccDeclare)s
53
54            %(CompleteAccDeclare)s
55        };
56}};
57
58let {{
59    def doMemFormat(code, execute, faultCode, name, Name, asi, opt_flags, postacc_code = ''):
60        addrCalcReg = 'EA = Rs1 + Rs2;'
61        addrCalcImm = 'EA = Rs1 + imm;'
62        iop = InstObjParams(name, Name, 'Mem',
63                {"code": code, "postacc_code" : postacc_code,
64                 "fault_check": faultCode, "ea_code": addrCalcReg,
65                 "EA_trunc": TruncateEA}, opt_flags)
66        iop_imm = InstObjParams(name, Name + "Imm", 'MemImm',
67                {"code": code, "postacc_code" : postacc_code,
68                 "fault_check": faultCode, "ea_code": addrCalcImm,
69                 "EA_trunc": TruncateEA}, opt_flags)
70        header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm)
71        decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm)
72        decode_block = ROrImmDecode.subst(iop)
73        exec_output = doDualSplitExecute(code, postacc_code, addrCalcReg,
74                addrCalcImm, execute, faultCode, name, name + "Imm",
75                Name, Name + "Imm", asi, opt_flags)
76        exec_output +=  EACompExecute.subst(iop);
77        exec_output +=  EACompExecute.subst(iop_imm);
78        return (header_output, decoder_output, exec_output, decode_block)
79}};
80
81def format LoadAlt(code, *opt_flags) {{
82        code = filterDoubles(code)
83        (header_output,
84         decoder_output,
85         exec_output,
86         decode_block) = doMemFormat(code, LoadFuncs,
87            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
88}};
89
90def format StoreAlt(code, *opt_flags) {{
91        code = filterDoubles(code)
92        (header_output,
93         decoder_output,
94         exec_output,
95         decode_block) = doMemFormat(code, StoreFuncs,
96            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
97}};
98
99def format Load(code, *opt_flags) {{
100        code = filterDoubles(code)
101        (header_output,
102         decoder_output,
103         exec_output,
104         decode_block) = doMemFormat(code,
105             LoadFuncs, '', name, Name, 0, opt_flags)
106}};
107
108def format Store(code, *opt_flags) {{
109        code = filterDoubles(code)
110        (header_output,
111         decoder_output,
112         exec_output,
113         decode_block) = doMemFormat(code,
114             StoreFuncs, '', name, Name, 0, opt_flags)
115}};
116
117def format StoreFsr(code, *opt_flags) {{
118        code = filterDoubles(code)
119        (header_output,
120         decoder_output,
121         exec_output,
122         decode_block) = doMemFormat(code,
123             StoreFuncs, '', name, Name, 0, opt_flags,
124             'Fsr = insertBits(Fsr,16,14,0);')
125}};
126
127def format TwinLoad(code, *opt_flags) {{
128        (header_output,
129         decoder_output,
130         exec_output,
131         decode_block) = doMemFormat(code, LoadFuncs,
132            AlternateASIPrivFaultCheck + TwinAlignmentFaultCheck,
133            name, Name, "EXT_ASI", opt_flags)
134}};
135
136