basicmem.isa revision 12616:4b463b4dc098 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006-2007 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Ali Saidi
30//          Gabe Black
31
32////////////////////////////////////////////////////////////////////
33//
34// Mem instructions
35//
36
37def template MemDeclare {{
38        /**
39         * Static instruction class for "%(mnemonic)s".
40         */
41        class %(class_name)s : public %(base_class)s
42        {
43          public:
44
45            /// Constructor.
46            %(class_name)s(ExtMachInst machInst);
47
48            Fault execute(ExecContext *, Trace::InstRecord *) const override;
49            Fault initiateAcc(ExecContext *,
50                              Trace::InstRecord *) const override;
51            Fault completeAcc(PacketPtr, ExecContext *,
52                              Trace::InstRecord *) const override;
53        };
54}};
55
56let {{
57    def doMemFormat(code, execute, faultCode, name, Name, asi, opt_flags, postacc_code = ''):
58        addrCalcReg = 'EA = Rs1 + Rs2;'
59        addrCalcImm = 'EA = Rs1 + imm;'
60        iop = InstObjParams(name, Name, 'Mem',
61                {"code": code, "postacc_code" : postacc_code,
62                 "fault_check": faultCode, "ea_code": addrCalcReg,
63                 "EA_trunc": TruncateEA}, opt_flags)
64        iop_imm = InstObjParams(name, Name + "Imm", 'MemImm',
65                {"code": code, "postacc_code" : postacc_code,
66                 "fault_check": faultCode, "ea_code": addrCalcImm,
67                 "EA_trunc": TruncateEA}, opt_flags)
68        header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm)
69        decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm)
70        decode_block = ROrImmDecode.subst(iop)
71        exec_output = doDualSplitExecute(code, postacc_code, addrCalcReg,
72                addrCalcImm, execute, faultCode, name, name + "Imm",
73                Name, Name + "Imm", asi, opt_flags)
74        return (header_output, decoder_output, exec_output, decode_block)
75}};
76
77def format LoadAlt(code, *opt_flags) {{
78        code = filterDoubles(code)
79        (header_output,
80         decoder_output,
81         exec_output,
82         decode_block) = doMemFormat(code, LoadFuncs,
83            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
84}};
85
86def format StoreAlt(code, *opt_flags) {{
87        code = filterDoubles(code)
88        (header_output,
89         decoder_output,
90         exec_output,
91         decode_block) = doMemFormat(code, StoreFuncs,
92            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
93}};
94
95def format Load(code, *opt_flags) {{
96        code = filterDoubles(code)
97        (header_output,
98         decoder_output,
99         exec_output,
100         decode_block) = doMemFormat(code,
101             LoadFuncs, '', name, Name, 0, opt_flags)
102}};
103
104def format Store(code, *opt_flags) {{
105        code = filterDoubles(code)
106        (header_output,
107         decoder_output,
108         exec_output,
109         decode_block) = doMemFormat(code,
110             StoreFuncs, '', name, Name, 0, opt_flags)
111}};
112
113def format StoreFsr(code, *opt_flags) {{
114        code = filterDoubles(code)
115        (header_output,
116         decoder_output,
117         exec_output,
118         decode_block) = doMemFormat(code,
119             StoreFuncs, '', name, Name, 0, opt_flags,
120             'Fsr = insertBits(Fsr,16,14,0);')
121}};
122
123def format TwinLoad(code, *opt_flags) {{
124        (header_output,
125         decoder_output,
126         exec_output,
127         decode_block) = doMemFormat(code, LoadFuncs,
128            AlternateASIPrivFaultCheck + TwinAlignmentFaultCheck,
129            name, Name, "EXT_ASI", opt_flags)
130}};
131
132