basicmem.isa revision 12385:288c62455dde 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006-2007 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Ali Saidi
30//          Gabe Black
31
32////////////////////////////////////////////////////////////////////
33//
34// Mem instructions
35//
36
37def template MemDeclare {{
38        /**
39         * Static instruction class for "%(mnemonic)s".
40         */
41        class %(class_name)s : public %(base_class)s
42        {
43          public:
44
45            /// Constructor.
46            %(class_name)s(ExtMachInst machInst);
47
48            Fault execute(ExecContext *, Trace::InstRecord *) const;
49            Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
50            Fault completeAcc(PacketPtr, ExecContext *,
51                              Trace::InstRecord *) const;
52        };
53}};
54
55let {{
56    def doMemFormat(code, execute, faultCode, name, Name, asi, opt_flags, postacc_code = ''):
57        addrCalcReg = 'EA = Rs1 + Rs2;'
58        addrCalcImm = 'EA = Rs1 + imm;'
59        iop = InstObjParams(name, Name, 'Mem',
60                {"code": code, "postacc_code" : postacc_code,
61                 "fault_check": faultCode, "ea_code": addrCalcReg,
62                 "EA_trunc": TruncateEA}, opt_flags)
63        iop_imm = InstObjParams(name, Name + "Imm", 'MemImm',
64                {"code": code, "postacc_code" : postacc_code,
65                 "fault_check": faultCode, "ea_code": addrCalcImm,
66                 "EA_trunc": TruncateEA}, opt_flags)
67        header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm)
68        decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm)
69        decode_block = ROrImmDecode.subst(iop)
70        exec_output = doDualSplitExecute(code, postacc_code, addrCalcReg,
71                addrCalcImm, execute, faultCode, name, name + "Imm",
72                Name, Name + "Imm", asi, opt_flags)
73        return (header_output, decoder_output, exec_output, decode_block)
74}};
75
76def format LoadAlt(code, *opt_flags) {{
77        code = filterDoubles(code)
78        (header_output,
79         decoder_output,
80         exec_output,
81         decode_block) = doMemFormat(code, LoadFuncs,
82            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
83}};
84
85def format StoreAlt(code, *opt_flags) {{
86        code = filterDoubles(code)
87        (header_output,
88         decoder_output,
89         exec_output,
90         decode_block) = doMemFormat(code, StoreFuncs,
91            AlternateASIPrivFaultCheck, name, Name, "EXT_ASI", opt_flags)
92}};
93
94def format Load(code, *opt_flags) {{
95        code = filterDoubles(code)
96        (header_output,
97         decoder_output,
98         exec_output,
99         decode_block) = doMemFormat(code,
100             LoadFuncs, '', name, Name, 0, opt_flags)
101}};
102
103def format Store(code, *opt_flags) {{
104        code = filterDoubles(code)
105        (header_output,
106         decoder_output,
107         exec_output,
108         decode_block) = doMemFormat(code,
109             StoreFuncs, '', name, Name, 0, opt_flags)
110}};
111
112def format StoreFsr(code, *opt_flags) {{
113        code = filterDoubles(code)
114        (header_output,
115         decoder_output,
116         exec_output,
117         decode_block) = doMemFormat(code,
118             StoreFuncs, '', name, Name, 0, opt_flags,
119             'Fsr = insertBits(Fsr,16,14,0);')
120}};
121
122def format TwinLoad(code, *opt_flags) {{
123        (header_output,
124         decoder_output,
125         exec_output,
126         decode_block) = doMemFormat(code, LoadFuncs,
127            AlternateASIPrivFaultCheck + TwinAlignmentFaultCheck,
128            name, Name, "EXT_ASI", opt_flags)
129}};
130
131