basic.isa revision 4008
13931Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302022SN/A 312022SN/A// Declarations for execute() methods. 322022SN/Adef template BasicExecDeclare {{ 332022SN/A Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const; 342022SN/A}}; 352022SN/A 363275Sgblack@eecs.umich.edu// Definitions of execute methods that panic. 373275Sgblack@eecs.umich.edudef template BasicExecPanic {{ 383275Sgblack@eecs.umich.edu Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const 393275Sgblack@eecs.umich.edu { 403275Sgblack@eecs.umich.edu panic("Execute method called when it shouldn't!"); 413918Ssaidi@eecs.umich.edu M5_DUMMY_RETURN 423275Sgblack@eecs.umich.edu } 433275Sgblack@eecs.umich.edu}}; 443275Sgblack@eecs.umich.edu 452022SN/A// Basic instruction class declaration template. 462022SN/Adef template BasicDeclare {{ 472022SN/A /** 482022SN/A * Static instruction class for "%(mnemonic)s". 492022SN/A */ 502022SN/A class %(class_name)s : public %(base_class)s 512022SN/A { 522224SN/A public: 532224SN/A // Constructor. 543384Sgblack@eecs.umich.edu %(class_name)s(ExtMachInst machInst); 552224SN/A %(BasicExecDeclare)s 562224SN/A }; 572022SN/A}}; 582022SN/A 592022SN/A// Basic instruction class constructor template. 602022SN/Adef template BasicConstructor {{ 613384Sgblack@eecs.umich.edu inline %(class_name)s::%(class_name)s(ExtMachInst machInst) 622224SN/A : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) 632022SN/A { 642022SN/A %(constructor)s; 652022SN/A } 662022SN/A}}; 672022SN/A 682022SN/A// Basic instruction class execute method template. 692022SN/Adef template BasicExecute {{ 702224SN/A Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 712224SN/A Trace::InstRecord *traceData) const 722022SN/A { 732224SN/A Fault fault = NoFault; 742022SN/A 753931Ssaidi@eecs.umich.edu %(fp_enable_check)s; 762224SN/A %(op_decl)s; 772224SN/A %(op_rd)s; 782224SN/A %(code)s; 792022SN/A 802224SN/A if(fault == NoFault) 812224SN/A { 822224SN/A %(op_wb)s; 832224SN/A } 842224SN/A return fault; 852022SN/A } 862022SN/A}}; 872022SN/A 882022SN/A// Basic decode template. 892022SN/Adef template BasicDecode {{ 902022SN/A return new %(class_name)s(machInst); 912022SN/A}}; 922022SN/A 933272Sgblack@eecs.umich.edu// Basic decode template, passing mnemonic in as string arg to constructor. 943272Sgblack@eecs.umich.edudef template BasicDecodeWithMnemonic {{ 953272Sgblack@eecs.umich.edu return new %(class_name)s("%(mnemonic)s", machInst); 963272Sgblack@eecs.umich.edu}}; 973272Sgblack@eecs.umich.edu 982022SN/A// The most basic instruction format... used only for a few misc. insts 992022SN/Adef format BasicOperate(code, *flags) {{ 1003792Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'SparcStaticInst', code, flags) 1012022SN/A header_output = BasicDeclare.subst(iop) 1022022SN/A decoder_output = BasicConstructor.subst(iop) 1032022SN/A decode_block = BasicDecode.subst(iop) 1042022SN/A exec_output = BasicExecute.subst(iop) 1052022SN/A}}; 1064008Ssaidi@eecs.umich.edu 1074008Ssaidi@eecs.umich.edudef format FpBasic(code, *flags) {{ 1084008Ssaidi@eecs.umich.edu fp_code = """ 1094008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr,4,0,0); 1104008Ssaidi@eecs.umich.edu#if defined(__sun) || defined (__OpenBSD__) 1114008Ssaidi@eecs.umich.edu fp_rnd newrnd = FP_RN; 1124008Ssaidi@eecs.umich.edu switch (Fsr<31:30>) { 1134008Ssaidi@eecs.umich.edu case 0: newrnd = FP_RN; break; 1144008Ssaidi@eecs.umich.edu case 1: newrnd = FP_RZ; break; 1154008Ssaidi@eecs.umich.edu case 2: newrnd = FP_RP; break; 1164008Ssaidi@eecs.umich.edu case 3: newrnd = FP_RM; break; 1174008Ssaidi@eecs.umich.edu } 1184008Ssaidi@eecs.umich.edu fp_rnd oldrnd = fpsetround(newrnd); 1194008Ssaidi@eecs.umich.edu#else 1204008Ssaidi@eecs.umich.edu int newrnd = FE_TONEAREST; 1214008Ssaidi@eecs.umich.edu switch (Fsr<31:30>) { 1224008Ssaidi@eecs.umich.edu case 0: newrnd = FE_TONEAREST; break; 1234008Ssaidi@eecs.umich.edu case 1: newrnd = FE_TOWARDZERO; break; 1244008Ssaidi@eecs.umich.edu case 2: newrnd = FE_UPWARD; break; 1254008Ssaidi@eecs.umich.edu case 3: newrnd = FE_DOWNWARD; break; 1264008Ssaidi@eecs.umich.edu } 1274008Ssaidi@eecs.umich.edu int oldrnd = fegetround(); 1284008Ssaidi@eecs.umich.edu fesetround(newrnd); 1294008Ssaidi@eecs.umich.edu#endif 1304008Ssaidi@eecs.umich.edu""" 1314008Ssaidi@eecs.umich.edu fp_code += code 1324008Ssaidi@eecs.umich.edu fp_code += """ 1334008Ssaidi@eecs.umich.edu#if defined(__sun) || defined (__OpenBSD__) 1344008Ssaidi@eecs.umich.edu fpsetround(oldrnd); 1354008Ssaidi@eecs.umich.edu#else 1364008Ssaidi@eecs.umich.edu fesetround(oldrnd); 1374008Ssaidi@eecs.umich.edu#endif 1384008Ssaidi@eecs.umich.edu""" 1394008Ssaidi@eecs.umich.edu iop = InstObjParams(name, Name, 'SparcStaticInst', fp_code, flags) 1404008Ssaidi@eecs.umich.edu header_output = BasicDeclare.subst(iop) 1414008Ssaidi@eecs.umich.edu decoder_output = BasicConstructor.subst(iop) 1424008Ssaidi@eecs.umich.edu decode_block = BasicDecode.subst(iop) 1434008Ssaidi@eecs.umich.edu exec_output = BasicExecute.subst(iop) 1444008Ssaidi@eecs.umich.edu}}; 145