priv.hh revision 12287
1/* 2 * Copyright (c) 2006-2007 The Regents of The University of Michigan 3 * All rights reserved 4 * Copyright 2017 Google Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Ali Saidi 30 * Gabe Black 31 * Steve Reinhardt 32 */ 33 34#ifndef __ARCH_SPARC_INSTS_PRIV_HH__ 35#define __ARCH_SPARC_INSTS_PRIV_HH__ 36 37#include "arch/sparc/insts/static_inst.hh" 38 39namespace SparcISA 40{ 41 42/** 43 * Base class for privelege mode operations. 44 */ 45class Priv : public SparcStaticInst 46{ 47 protected: 48 using SparcStaticInst::SparcStaticInst; 49 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 50}; 51 52class PrivReg : public Priv 53{ 54 protected: 55 PrivReg(const char *mnem, ExtMachInst _machInst, 56 OpClass __opClass, char const * _regName) : 57 Priv(mnem, _machInst, __opClass), regName(_regName) 58 {} 59 60 char const *regName; 61}; 62 63// This class is for instructions that explicitly read control 64// registers. It provides a special generateDisassembly function. 65class RdPriv : public PrivReg 66{ 67 protected: 68 using PrivReg::PrivReg; 69 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 70}; 71 72// This class is for instructions that explicitly write control 73// registers. It provides a special generateDisassembly function. 74class WrPriv : public PrivReg 75{ 76 protected: 77 using PrivReg::PrivReg; 78 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 79}; 80 81/** 82 * Base class for privelege mode operations with immediates. 83 */ 84class PrivImm : public Priv 85{ 86 protected: 87 // Constructor 88 PrivImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 89 Priv(mnem, _machInst, __opClass), imm(bits(_machInst, 12, 0)) 90 {} 91 92 int32_t imm; 93}; 94 95// This class is for instructions that explicitly write control 96// registers. It provides a special generateDisassembly function. 97class WrPrivImm : public PrivImm 98{ 99 protected: 100 // Constructor 101 WrPrivImm(const char *mnem, ExtMachInst _machInst, 102 OpClass __opClass, char const *_regName) : 103 PrivImm(mnem, _machInst, __opClass), regName(_regName) 104 {} 105 106 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 107 108 char const *regName; 109} 110; 111} 112 113#endif //__ARCH_SPARC_INSTS_PRIV_HH__ 114