faults.hh revision 8569
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "cpu/static_inst.hh"
37#include "sim/faults.hh"
38
39// The design of the "name" and "vect" functions is in sim/faults.hh
40
41namespace SparcISA
42{
43
44typedef uint32_t TrapType;
45typedef uint32_t FaultPriority;
46
47class ITB;
48
49class SparcFaultBase : public FaultBase
50{
51  public:
52    enum PrivilegeLevel
53    {
54        U, User = U,
55        P, Privileged = P,
56        H, Hyperprivileged = H,
57        NumLevels,
58        SH = -1,
59        ShouldntHappen = SH
60    };
61    struct FaultVals
62    {
63        const FaultName name;
64        const TrapType trapType;
65        const FaultPriority priority;
66        const PrivilegeLevel nextPrivilegeLevel[NumLevels];
67        FaultStat count;
68    };
69#if FULL_SYSTEM
70    void invoke(ThreadContext * tc,
71            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
72#endif
73    virtual TrapType trapType() = 0;
74    virtual FaultPriority priority() = 0;
75    virtual FaultStat & countStat() = 0;
76    virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
77};
78
79template<typename T>
80class SparcFault : public SparcFaultBase
81{
82  protected:
83    static FaultVals vals;
84  public:
85    FaultName name() const { return vals.name; }
86    TrapType trapType() { return vals.trapType; }
87    FaultPriority priority() { return vals.priority; }
88    FaultStat & countStat() { return vals.count; }
89
90    PrivilegeLevel
91    getNextLevel(PrivilegeLevel current)
92    {
93        return vals.nextPrivilegeLevel[current];
94    }
95};
96
97class PowerOnReset : public SparcFault<PowerOnReset>
98{
99#if FULL_SYSTEM
100    void invoke(ThreadContext * tc,
101            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
102#endif
103};
104
105class WatchDogReset : public SparcFault<WatchDogReset> {};
106
107class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
108
109class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
110
111class REDStateException : public SparcFault<REDStateException> {};
112
113class StoreError : public SparcFault<StoreError> {};
114
115class InstructionAccessException : public SparcFault<InstructionAccessException> {};
116
117// class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
118
119class InstructionAccessError : public SparcFault<InstructionAccessError> {};
120
121class IllegalInstruction : public SparcFault<IllegalInstruction> {};
122
123class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
124
125// class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
126
127// class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
128
129class FpDisabled : public SparcFault<FpDisabled> {};
130
131class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
132
133class FpExceptionOther : public SparcFault<FpExceptionOther> {};
134
135class TagOverflow : public SparcFault<TagOverflow> {};
136
137class CleanWindow : public SparcFault<CleanWindow> {};
138
139class DivisionByZero : public SparcFault<DivisionByZero> {};
140
141class InternalProcessorError :
142    public SparcFault<InternalProcessorError> {};
143
144class InstructionInvalidTSBEntry :
145    public SparcFault<InstructionInvalidTSBEntry> {};
146
147class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
148
149class DataAccessException : public SparcFault<DataAccessException> {};
150
151// class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
152
153class DataAccessError : public SparcFault<DataAccessError> {};
154
155class DataAccessProtection : public SparcFault<DataAccessProtection> {};
156
157class MemAddressNotAligned :
158    public SparcFault<MemAddressNotAligned> {};
159
160class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
161
162class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
163
164class PrivilegedAction : public SparcFault<PrivilegedAction> {};
165
166class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
167
168class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
169
170class InstructionRealTranslationMiss :
171    public SparcFault<InstructionRealTranslationMiss> {};
172
173class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
174
175// class AsyncDataError : public SparcFault<AsyncDataError> {};
176
177template <class T>
178class EnumeratedFault : public SparcFault<T>
179{
180  protected:
181    uint32_t _n;
182  public:
183    EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
184    TrapType trapType() { return SparcFault<T>::trapType() + _n; }
185};
186
187class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
188{
189  public:
190    InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
191    FaultPriority priority() { return 3200 - _n*100; }
192};
193
194class HstickMatch : public SparcFault<HstickMatch> {};
195
196class TrapLevelZero : public SparcFault<TrapLevelZero> {};
197
198class InterruptVector : public SparcFault<InterruptVector> {};
199
200class PAWatchpoint : public SparcFault<PAWatchpoint> {};
201
202class VAWatchpoint : public SparcFault<VAWatchpoint> {};
203
204class FastInstructionAccessMMUMiss :
205    public SparcFault<FastInstructionAccessMMUMiss>
206{
207#if !FULL_SYSTEM
208  protected:
209    Addr vaddr;
210  public:
211    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
212    {}
213    void invoke(ThreadContext * tc,
214            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
215#endif
216};
217
218class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
219{
220#if !FULL_SYSTEM
221  protected:
222    Addr vaddr;
223  public:
224    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
225    {}
226    void invoke(ThreadContext * tc,
227            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
228#endif
229};
230
231class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
232
233class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
234
235class CpuMondo : public SparcFault<CpuMondo> {};
236
237class DevMondo : public SparcFault<DevMondo> {};
238
239class ResumableError : public SparcFault<ResumableError> {};
240
241class SpillNNormal : public EnumeratedFault<SpillNNormal>
242{
243  public:
244    SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
245    // These need to be handled specially to enable spill traps in SE
246#if !FULL_SYSTEM
247    void invoke(ThreadContext * tc,
248            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
249#endif
250};
251
252class SpillNOther : public EnumeratedFault<SpillNOther>
253{
254  public:
255    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
256    {}
257};
258
259class FillNNormal : public EnumeratedFault<FillNNormal>
260{
261  public:
262    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
263    {}
264    // These need to be handled specially to enable fill traps in SE
265#if !FULL_SYSTEM
266    void invoke(ThreadContext * tc,
267            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
268#endif
269};
270
271class FillNOther : public EnumeratedFault<FillNOther>
272{
273  public:
274    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
275    {}
276};
277
278class TrapInstruction : public EnumeratedFault<TrapInstruction>
279{
280  public:
281    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
282    {}
283    // In SE, trap instructions are requesting services from the OS.
284#if !FULL_SYSTEM
285    void invoke(ThreadContext * tc,
286            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
287#endif
288};
289
290static inline Fault
291genMachineCheckFault()
292{
293    return new InternalProcessorError;
294}
295
296
297} // namespace SparcISA
298
299#endif // __SPARC_FAULTS_HH__
300