faults.hh revision 7741
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "cpu/static_inst.hh"
37#include "sim/faults.hh"
38
39// The design of the "name" and "vect" functions is in sim/faults.hh
40
41namespace SparcISA
42{
43
44typedef uint32_t TrapType;
45typedef uint32_t FaultPriority;
46
47class ITB;
48
49class SparcFaultBase : public FaultBase
50{
51  public:
52    enum PrivilegeLevel
53    {
54        U, User = U,
55        P, Privileged = P,
56        H, Hyperprivileged = H,
57        NumLevels,
58        SH = -1,
59        ShouldntHappen = SH
60    };
61    struct FaultVals
62    {
63        const FaultName name;
64        const TrapType trapType;
65        const FaultPriority priority;
66        const PrivilegeLevel nextPrivilegeLevel[NumLevels];
67        FaultStat count;
68    };
69#if FULL_SYSTEM
70    void invoke(ThreadContext * tc,
71            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
72#endif
73    virtual TrapType trapType() = 0;
74    virtual FaultPriority priority() = 0;
75    virtual FaultStat & countStat() = 0;
76    virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
77};
78
79template<typename T>
80class SparcFault : public SparcFaultBase
81{
82  protected:
83    static FaultVals vals;
84  public:
85    FaultName name() const { return vals.name; }
86    TrapType trapType() { return vals.trapType; }
87    FaultPriority priority() { return vals.priority; }
88    FaultStat & countStat() { return vals.count; }
89
90    PrivilegeLevel
91    getNextLevel(PrivilegeLevel current)
92    {
93        return vals.nextPrivilegeLevel[current];
94    }
95};
96
97class PowerOnReset : public SparcFault<PowerOnReset>
98{
99#if FULL_SYSTEM
100    void invoke(ThreadContext * tc,
101            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
102#endif
103};
104
105class WatchDogReset : public SparcFault<WatchDogReset> {};
106
107class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
108
109class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
110
111class REDStateException : public SparcFault<REDStateException> {};
112
113class StoreError : public SparcFault<StoreError> {};
114
115class InstructionAccessException : public SparcFault<InstructionAccessException> {};
116
117// class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
118
119class InstructionAccessError : public SparcFault<InstructionAccessError> {};
120
121class IllegalInstruction : public SparcFault<IllegalInstruction> {};
122
123class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
124
125// class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
126
127// class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
128
129class FpDisabled : public SparcFault<FpDisabled> {};
130
131class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
132
133class FpExceptionOther : public SparcFault<FpExceptionOther> {};
134
135class TagOverflow : public SparcFault<TagOverflow> {};
136
137class CleanWindow : public SparcFault<CleanWindow> {};
138
139class DivisionByZero : public SparcFault<DivisionByZero> {};
140
141class InternalProcessorError :
142    public SparcFault<InternalProcessorError>
143{
144  public:
145    bool isMachineCheckFault() const { return true; }
146};
147
148class InstructionInvalidTSBEntry :
149    public SparcFault<InstructionInvalidTSBEntry> {};
150
151class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
152
153class DataAccessException : public SparcFault<DataAccessException> {};
154
155// class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
156
157class DataAccessError : public SparcFault<DataAccessError> {};
158
159class DataAccessProtection : public SparcFault<DataAccessProtection> {};
160
161class MemAddressNotAligned :
162    public SparcFault<MemAddressNotAligned>
163{
164  public:
165    bool isAlignmentFault() const { return true; }
166};
167
168class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
169
170class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
171
172class PrivilegedAction : public SparcFault<PrivilegedAction> {};
173
174class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
175
176class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
177
178class InstructionRealTranslationMiss :
179    public SparcFault<InstructionRealTranslationMiss> {};
180
181class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
182
183// class AsyncDataError : public SparcFault<AsyncDataError> {};
184
185template <class T>
186class EnumeratedFault : public SparcFault<T>
187{
188  protected:
189    uint32_t _n;
190  public:
191    EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
192    TrapType trapType() { return SparcFault<T>::trapType() + _n; }
193};
194
195class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
196{
197  public:
198    InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
199    FaultPriority priority() { return 3200 - _n*100; }
200};
201
202class HstickMatch : public SparcFault<HstickMatch> {};
203
204class TrapLevelZero : public SparcFault<TrapLevelZero> {};
205
206class InterruptVector : public SparcFault<InterruptVector> {};
207
208class PAWatchpoint : public SparcFault<PAWatchpoint> {};
209
210class VAWatchpoint : public SparcFault<VAWatchpoint> {};
211
212class FastInstructionAccessMMUMiss :
213    public SparcFault<FastInstructionAccessMMUMiss>
214{
215#if !FULL_SYSTEM
216  protected:
217    Addr vaddr;
218  public:
219    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
220    {}
221    void invoke(ThreadContext * tc,
222            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
223#endif
224};
225
226class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
227{
228#if !FULL_SYSTEM
229  protected:
230    Addr vaddr;
231  public:
232    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
233    {}
234    void invoke(ThreadContext * tc,
235            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
236#endif
237};
238
239class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
240
241class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
242
243class CpuMondo : public SparcFault<CpuMondo> {};
244
245class DevMondo : public SparcFault<DevMondo> {};
246
247class ResumableError : public SparcFault<ResumableError> {};
248
249class SpillNNormal : public EnumeratedFault<SpillNNormal>
250{
251  public:
252    SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
253    // These need to be handled specially to enable spill traps in SE
254#if !FULL_SYSTEM
255    void invoke(ThreadContext * tc,
256            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
257#endif
258};
259
260class SpillNOther : public EnumeratedFault<SpillNOther>
261{
262  public:
263    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n)
264    {}
265};
266
267class FillNNormal : public EnumeratedFault<FillNNormal>
268{
269  public:
270    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n)
271    {}
272    // These need to be handled specially to enable fill traps in SE
273#if !FULL_SYSTEM
274    void invoke(ThreadContext * tc,
275            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
276#endif
277};
278
279class FillNOther : public EnumeratedFault<FillNOther>
280{
281  public:
282    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n)
283    {}
284};
285
286class TrapInstruction : public EnumeratedFault<TrapInstruction>
287{
288  public:
289    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n)
290    {}
291    // In SE, trap instructions are requesting services from the OS.
292#if !FULL_SYSTEM
293    void invoke(ThreadContext * tc,
294            StaticInstPtr inst = StaticInst::nullStaticInstPtr);
295#endif
296};
297
298static inline Fault
299genMachineCheckFault()
300{
301    return new InternalProcessorError;
302}
303
304
305} // SparcISA namespace
306
307#endif // __SPARC_FAULTS_HH__
308