faults.hh revision 5004:7d94cedab264
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Kevin Lim
30 */
31
32#ifndef __SPARC_FAULTS_HH__
33#define __SPARC_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "sim/faults.hh"
37
38// The design of the "name" and "vect" functions is in sim/faults.hh
39
40namespace SparcISA
41{
42
43typedef uint32_t TrapType;
44typedef uint32_t FaultPriority;
45
46class ITB;
47
48class SparcFaultBase : public FaultBase
49{
50  public:
51    enum PrivilegeLevel
52    {
53        U, User = U,
54        P, Privileged = P,
55        H, Hyperprivileged = H,
56        NumLevels,
57        SH = -1,
58        ShouldntHappen = SH
59    };
60    struct FaultVals
61    {
62        const FaultName name;
63        const TrapType trapType;
64        const FaultPriority priority;
65        const PrivilegeLevel nextPrivilegeLevel[NumLevels];
66        FaultStat count;
67    };
68#if FULL_SYSTEM
69    void invoke(ThreadContext * tc);
70#endif
71    virtual TrapType trapType() = 0;
72    virtual FaultPriority priority() = 0;
73    virtual FaultStat & countStat() = 0;
74    virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
75};
76
77template<typename T>
78class SparcFault : public SparcFaultBase
79{
80  protected:
81    static FaultVals vals;
82  public:
83    FaultName name() const {return vals.name;}
84    TrapType trapType() {return vals.trapType;}
85    FaultPriority priority() {return vals.priority;}
86    FaultStat & countStat() {return vals.count;}
87    PrivilegeLevel getNextLevel(PrivilegeLevel current)
88    {
89        return vals.nextPrivilegeLevel[current];
90    }
91};
92
93class PowerOnReset : public SparcFault<PowerOnReset>
94{
95    void invoke(ThreadContext * tc);
96};
97
98class WatchDogReset : public SparcFault<WatchDogReset> {};
99
100class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
101
102class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
103
104class REDStateException : public SparcFault<REDStateException> {};
105
106class StoreError : public SparcFault<StoreError> {};
107
108class InstructionAccessException : public SparcFault<InstructionAccessException> {};
109
110//class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
111
112class InstructionAccessError : public SparcFault<InstructionAccessError> {};
113
114class IllegalInstruction : public SparcFault<IllegalInstruction> {};
115
116class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
117
118//class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
119
120//class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
121
122class FpDisabled : public SparcFault<FpDisabled> {};
123
124class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
125
126class FpExceptionOther : public SparcFault<FpExceptionOther> {};
127
128class TagOverflow : public SparcFault<TagOverflow> {};
129
130class CleanWindow : public SparcFault<CleanWindow> {};
131
132class DivisionByZero : public SparcFault<DivisionByZero> {};
133
134class InternalProcessorError :
135    public SparcFault<InternalProcessorError>
136{
137  public:
138    bool isMachineCheckFault() const {return true;}
139};
140
141class InstructionInvalidTSBEntry : public SparcFault<InstructionInvalidTSBEntry> {};
142
143class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
144
145class DataAccessException : public SparcFault<DataAccessException> {};
146
147//class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
148
149class DataAccessError : public SparcFault<DataAccessError> {};
150
151class DataAccessProtection : public SparcFault<DataAccessProtection> {};
152
153class MemAddressNotAligned :
154    public SparcFault<MemAddressNotAligned>
155{
156  public:
157    bool isAlignmentFault() const {return true;}
158};
159
160class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
161
162class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
163
164class PrivilegedAction : public SparcFault<PrivilegedAction> {};
165
166class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
167
168class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
169
170class InstructionRealTranslationMiss :
171    public SparcFault<InstructionRealTranslationMiss> {};
172
173class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
174
175//class AsyncDataError : public SparcFault<AsyncDataError> {};
176
177template <class T>
178class EnumeratedFault : public SparcFault<T>
179{
180  protected:
181    uint32_t _n;
182  public:
183    EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
184    TrapType trapType() {return SparcFault<T>::trapType() + _n;}
185};
186
187class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
188{
189  public:
190    InterruptLevelN(uint32_t n) : EnumeratedFault<InterruptLevelN>(n) {;}
191    FaultPriority priority() {return 3200 - _n*100;}
192};
193
194class HstickMatch : public SparcFault<HstickMatch> {};
195
196class TrapLevelZero : public SparcFault<TrapLevelZero> {};
197
198class InterruptVector : public SparcFault<InterruptVector> {};
199
200class PAWatchpoint : public SparcFault<PAWatchpoint> {};
201
202class VAWatchpoint : public SparcFault<VAWatchpoint> {};
203
204class FastInstructionAccessMMUMiss :
205    public SparcFault<FastInstructionAccessMMUMiss>
206{
207#if !FULL_SYSTEM
208  protected:
209    Addr vaddr;
210  public:
211    FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr)
212    {}
213    void invoke(ThreadContext * tc);
214#endif
215};
216
217class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
218{
219#if !FULL_SYSTEM
220  protected:
221    Addr vaddr;
222  public:
223    FastDataAccessMMUMiss(Addr addr) : vaddr(addr)
224    {}
225    void invoke(ThreadContext * tc);
226#endif
227};
228
229class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
230
231class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
232
233class CpuMondo : public SparcFault<CpuMondo> {};
234
235class DevMondo : public SparcFault<DevMondo> {};
236
237class ResumableError : public SparcFault<ResumableError> {};
238
239class SpillNNormal : public EnumeratedFault<SpillNNormal>
240{
241  public:
242    SpillNNormal(uint32_t n) : EnumeratedFault<SpillNNormal>(n) {;}
243    //These need to be handled specially to enable spill traps in SE
244#if !FULL_SYSTEM
245    void invoke(ThreadContext * tc);
246#endif
247};
248
249class SpillNOther : public EnumeratedFault<SpillNOther>
250{
251  public:
252    SpillNOther(uint32_t n) : EnumeratedFault<SpillNOther>(n) {;}
253};
254
255class FillNNormal : public EnumeratedFault<FillNNormal>
256{
257  public:
258    FillNNormal(uint32_t n) : EnumeratedFault<FillNNormal>(n) {;}
259    //These need to be handled specially to enable fill traps in SE
260#if !FULL_SYSTEM
261    void invoke(ThreadContext * tc);
262#endif
263};
264
265class FillNOther : public EnumeratedFault<FillNOther>
266{
267  public:
268    FillNOther(uint32_t n) : EnumeratedFault<FillNOther>(n) {;}
269};
270
271class TrapInstruction : public EnumeratedFault<TrapInstruction>
272{
273  public:
274    TrapInstruction(uint32_t n) : EnumeratedFault<TrapInstruction>(n) {;}
275    //In SE, trap instructions are requesting services from the OS.
276#if !FULL_SYSTEM
277    void invoke(ThreadContext * tc);
278#endif
279};
280
281static inline Fault genMachineCheckFault()
282{
283    return new InternalProcessorError;
284}
285
286
287} // SparcISA namespace
288
289#endif // __SPARC_FAULTS_HH__
290