faults.cc revision 2612
12SN/A/* 21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu#include "arch/sparc/faults.hh" 302SN/A#include "cpu/exec_context.hh" 312SN/A#include "cpu/base.hh" 324183Sgblack@eecs.umich.edu#include "base/trace.hh" 332439SN/A 348229Snate@binkert.orgnamespace SparcISA 352680Sktlim@umich.edu{ 368232Snate@binkert.org 378229Snate@binkert.orgFaultName InternalProcessorError::_name = "intprocerr"; 384183Sgblack@eecs.umich.eduTrapType InternalProcessorError::_trapType = 0x029; 398784Sgblack@eecs.umich.eduFaultPriority InternalProcessorError::_priority = 4; 404183Sgblack@eecs.umich.eduFaultStat InternalProcessorError::_count; 412SN/A 4210417Sandreas.hansson@arm.comFaultName MemAddressNotAligned::_name = "unalign"; 432201SN/ATrapType MemAddressNotAligned::_trapType = 0x034; 448784Sgblack@eecs.umich.eduFaultPriority MemAddressNotAligned::_priority = 10; 458589Sgblack@eecs.umich.eduFaultStat MemAddressNotAligned::_count; 468589Sgblack@eecs.umich.edu 478589Sgblack@eecs.umich.eduFaultName PowerOnReset::_name = "pow_reset"; 488589Sgblack@eecs.umich.eduTrapType PowerOnReset::_trapType = 0x001; 492201SN/AFaultPriority PowerOnReset::_priority = 0; 502612SN/AFaultStat PowerOnReset::_count; 5110417Sandreas.hansson@arm.com 522612SN/AFaultName WatchDogReset::_name = "watch_dog_reset"; 536815SLisa.Hsu@amd.comTrapType WatchDogReset::_trapType = 0x002; 542612SN/AFaultPriority WatchDogReset::_priority = 1; 555004Sgblack@eecs.umich.eduFaultStat WatchDogReset::_count; 5610417Sandreas.hansson@arm.com 578545Ssaidi@eecs.umich.eduFaultName ExternallyInitiatedReset::_name = "extern_reset"; 588545Ssaidi@eecs.umich.eduTrapType ExternallyInitiatedReset::_trapType = 0x003; 598545Ssaidi@eecs.umich.eduFaultPriority ExternallyInitiatedReset::_priority = 1; 608545Ssaidi@eecs.umich.eduFaultStat ExternallyInitiatedReset::_count; 6110417Sandreas.hansson@arm.com 624183Sgblack@eecs.umich.eduFaultName SoftwareInitiatedReset::_name = "software_reset"; 638589Sgblack@eecs.umich.eduTrapType SoftwareInitiatedReset::_trapType = 0x004; 648784Sgblack@eecs.umich.eduFaultPriority SoftwareInitiatedReset::_priority = 1; 658784Sgblack@eecs.umich.eduFaultStat SoftwareInitiatedReset::_count; 668784Sgblack@eecs.umich.edu 678784Sgblack@eecs.umich.eduFaultName REDStateException::_name = "red_counte"; 688589Sgblack@eecs.umich.eduTrapType REDStateException::_trapType = 0x005; 694183Sgblack@eecs.umich.eduFaultPriority REDStateException::_priority = 1; 704434Ssaidi@eecs.umich.eduFaultStat REDStateException::_count; 714183Sgblack@eecs.umich.edu 725004Sgblack@eecs.umich.eduFaultName InstructionAccessException::_name = "inst_access"; 7310417Sandreas.hansson@arm.comTrapType InstructionAccessException::_trapType = 0x008; 745004Sgblack@eecs.umich.eduFaultPriority InstructionAccessException::_priority = 5; 755004Sgblack@eecs.umich.eduFaultStat InstructionAccessException::_count; 765004Sgblack@eecs.umich.edu 77FaultName InstructionAccessMMUMiss::_name = "inst_mmu"; 78TrapType InstructionAccessMMUMiss::_trapType = 0x009; 79FaultPriority InstructionAccessMMUMiss::_priority = 2; 80FaultStat InstructionAccessMMUMiss::_count; 81 82FaultName InstructionAccessError::_name = "inst_error"; 83TrapType InstructionAccessError::_trapType = 0x00A; 84FaultPriority InstructionAccessError::_priority = 3; 85FaultStat InstructionAccessError::_count; 86 87FaultName IllegalInstruction::_name = "illegal_inst"; 88TrapType IllegalInstruction::_trapType = 0x010; 89FaultPriority IllegalInstruction::_priority = 7; 90FaultStat IllegalInstruction::_count; 91 92FaultName PrivilegedOpcode::_name = "priv_opcode"; 93TrapType PrivilegedOpcode::_trapType = 0x011; 94FaultPriority PrivilegedOpcode::_priority = 6; 95FaultStat PrivilegedOpcode::_count; 96 97FaultName UnimplementedLDD::_name = "unimp_ldd"; 98TrapType UnimplementedLDD::_trapType = 0x012; 99FaultPriority UnimplementedLDD::_priority = 6; 100FaultStat UnimplementedLDD::_count; 101 102FaultName UnimplementedSTD::_name = "unimp_std"; 103TrapType UnimplementedSTD::_trapType = 0x013; 104FaultPriority UnimplementedSTD::_priority = 6; 105FaultStat UnimplementedSTD::_count; 106 107FaultName FpDisabled::_name = "fp_disabled"; 108TrapType FpDisabled::_trapType = 0x020; 109FaultPriority FpDisabled::_priority = 8; 110FaultStat FpDisabled::_count; 111 112FaultName FpExceptionIEEE754::_name = "fp_754"; 113TrapType FpExceptionIEEE754::_trapType = 0x021; 114FaultPriority FpExceptionIEEE754::_priority = 11; 115FaultStat FpExceptionIEEE754::_count; 116 117FaultName FpExceptionOther::_name = "fp_other"; 118TrapType FpExceptionOther::_trapType = 0x022; 119FaultPriority FpExceptionOther::_priority = 11; 120FaultStat FpExceptionOther::_count; 121 122FaultName TagOverflow::_name = "tag_overflow"; 123TrapType TagOverflow::_trapType = 0x023; 124FaultPriority TagOverflow::_priority = 14; 125FaultStat TagOverflow::_count; 126 127FaultName DivisionByZero::_name = "div_by_zero"; 128TrapType DivisionByZero::_trapType = 0x028; 129FaultPriority DivisionByZero::_priority = 15; 130FaultStat DivisionByZero::_count; 131 132FaultName DataAccessException::_name = "data_access"; 133TrapType DataAccessException::_trapType = 0x030; 134FaultPriority DataAccessException::_priority = 12; 135FaultStat DataAccessException::_count; 136 137FaultName DataAccessMMUMiss::_name = "data_mmu"; 138TrapType DataAccessMMUMiss::_trapType = 0x031; 139FaultPriority DataAccessMMUMiss::_priority = 12; 140FaultStat DataAccessMMUMiss::_count; 141 142FaultName DataAccessError::_name = "data_error"; 143TrapType DataAccessError::_trapType = 0x032; 144FaultPriority DataAccessError::_priority = 12; 145FaultStat DataAccessError::_count; 146 147FaultName DataAccessProtection::_name = "data_protection"; 148TrapType DataAccessProtection::_trapType = 0x033; 149FaultPriority DataAccessProtection::_priority = 12; 150FaultStat DataAccessProtection::_count; 151 152FaultName LDDFMemAddressNotAligned::_name = "unalign_lddf"; 153TrapType LDDFMemAddressNotAligned::_trapType = 0x035; 154FaultPriority LDDFMemAddressNotAligned::_priority = 10; 155FaultStat LDDFMemAddressNotAligned::_count; 156 157FaultName STDFMemAddressNotAligned::_name = "unalign_stdf"; 158TrapType STDFMemAddressNotAligned::_trapType = 0x036; 159FaultPriority STDFMemAddressNotAligned::_priority = 10; 160FaultStat STDFMemAddressNotAligned::_count; 161 162FaultName PrivilegedAction::_name = "priv_action"; 163TrapType PrivilegedAction::_trapType = 0x037; 164FaultPriority PrivilegedAction::_priority = 11; 165FaultStat PrivilegedAction::_count; 166 167FaultName LDQFMemAddressNotAligned::_name = "unalign_ldqf"; 168TrapType LDQFMemAddressNotAligned::_trapType = 0x038; 169FaultPriority LDQFMemAddressNotAligned::_priority = 10; 170FaultStat LDQFMemAddressNotAligned::_count; 171 172FaultName STQFMemAddressNotAligned::_name = "unalign_stqf"; 173TrapType STQFMemAddressNotAligned::_trapType = 0x039; 174FaultPriority STQFMemAddressNotAligned::_priority = 10; 175FaultStat STQFMemAddressNotAligned::_count; 176 177FaultName AsyncDataError::_name = "async_data"; 178TrapType AsyncDataError::_trapType = 0x040; 179FaultPriority AsyncDataError::_priority = 2; 180FaultStat AsyncDataError::_count; 181 182FaultName CleanWindow::_name = "clean_win"; 183TrapType CleanWindow::_trapType = 0x024; 184FaultPriority CleanWindow::_priority = 10; 185FaultStat CleanWindow::_count; 186 187//The enumerated faults 188 189FaultName InterruptLevelN::_name = "interrupt_n"; 190TrapType InterruptLevelN::_baseTrapType = 0x041; 191FaultStat InterruptLevelN::_count; 192 193FaultName SpillNNormal::_name = "spill_n_normal"; 194TrapType SpillNNormal::_baseTrapType = 0x080; 195FaultPriority SpillNNormal::_priority = 9; 196FaultStat SpillNNormal::_count; 197 198FaultName SpillNOther::_name = "spill_n_other"; 199TrapType SpillNOther::_baseTrapType = 0x0A0; 200FaultPriority SpillNOther::_priority = 9; 201FaultStat SpillNOther::_count; 202 203FaultName FillNNormal::_name = "fill_n_normal"; 204TrapType FillNNormal::_baseTrapType = 0x0C0; 205FaultPriority FillNNormal::_priority = 9; 206FaultStat FillNNormal::_count; 207 208FaultName FillNOther::_name = "fill_n_other"; 209TrapType FillNOther::_baseTrapType = 0x0E0; 210FaultPriority FillNOther::_priority = 9; 211FaultStat FillNOther::_count; 212 213FaultName TrapInstruction::_name = "trap_inst_n"; 214TrapType TrapInstruction::_baseTrapType = 0x100; 215FaultPriority TrapInstruction::_priority = 16; 216FaultStat TrapInstruction::_count; 217 218#if FULL_SYSTEM 219 220void SparcFault::invoke(ExecContext * xc) 221{ 222 FaultBase::invoke(xc); 223 countStat()++; 224 225 //Use the SPARC trap state machine 226 /*// exception restart address 227 if (setRestartAddress() || !xc->inPalMode()) 228 xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc); 229 230 if (skipFaultingInstruction()) { 231 // traps... skip faulting instruction. 232 xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, 233 xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4); 234 } 235 236 if (!xc->inPalMode()) 237 AlphaISA::swap_palshadow(&(xc->regs), true); 238 239 xc->regs.pc = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + vect(); 240 xc->regs.npc = xc->regs.pc + sizeof(MachInst);*/ 241} 242 243#endif 244 245#if !FULL_SYSTEM 246 247void TrapInstruction::invoke(ExecContext * xc) 248{ 249 xc->syscall(syscall_num); 250} 251 252#endif 253 254} // namespace SparcISA 255 256