process.hh revision 12030
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2017 The University of Virginia 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Gabe Black 30 * Ali Saidi 31 * Alec Roelke 32 */ 33 34#ifndef __RISCV_PROCESS_HH__ 35#define __RISCV_PROCESS_HH__ 36 37#include <string> 38#include <vector> 39 40#include "mem/page_table.hh" 41#include "sim/process.hh" 42 43class ObjectFile; 44class System; 45 46class RiscvProcess : public Process 47{ 48 protected: 49 RiscvProcess(ProcessParams * params, ObjectFile *objFile); 50 51 void initState() override; 52 53 template<class IntType> 54 void argsInit(int pageSize); 55 56 public: 57 RiscvISA::IntReg getSyscallArg(ThreadContext *tc, int &i) override; 58 /// Explicitly import the otherwise hidden getSyscallArg 59 using Process::getSyscallArg; 60 void setSyscallArg(ThreadContext *tc, int i, 61 RiscvISA::IntReg val) override; 62 void setSyscallReturn(ThreadContext *tc, 63 SyscallReturn return_value) override; 64 65 virtual bool mmapGrowsDown() const override { return false; } 66}; 67 68/* No architectural page table defined for this ISA */ 69typedef NoArchPageTable ArchPageTable; 70 71 72#endif // __RISCV_PROCESS_HH__ 73