process.hh revision 11800 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32#ifndef __RISCV_PROCESS_HH__
33#define __RISCV_PROCESS_HH__
34
35#include <string>
36#include <vector>
37
38#include "mem/page_table.hh"
39#include "sim/process.hh"
40
41class LiveProcess;
42class ObjectFile;
43class System;
44
45class RiscvLiveProcess : public LiveProcess
46{
47  protected:
48    RiscvLiveProcess(LiveProcessParams * params, ObjectFile *objFile);
49
50    void initState();
51
52    template<class IntType>
53    void argsInit(int pageSize);
54
55  public:
56    RiscvISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
57    /// Explicitly import the otherwise hidden getSyscallArg
58    using LiveProcess::getSyscallArg;
59    void setSyscallArg(ThreadContext *tc, int i, RiscvISA::IntReg val);
60    void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
61};
62
63/* No architectural page table defined for this ISA */
64typedef NoArchPageTable ArchPageTable;
65
66
67#endif // __RISCV_PROCESS_HH__
68