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112120Sar4jc@virginia.edu// -*- mode:c++ -*- 212120Sar4jc@virginia.edu 312120Sar4jc@virginia.edu// Copyright (c) 2015 RISC-V Foundation 412120Sar4jc@virginia.edu// Copyright (c) 2017 The University of Virginia 512120Sar4jc@virginia.edu// All rights reserved. 612120Sar4jc@virginia.edu// 712120Sar4jc@virginia.edu// Redistribution and use in source and binary forms, with or without 812120Sar4jc@virginia.edu// modification, are permitted provided that the following conditions are 912120Sar4jc@virginia.edu// met: redistributions of source code must retain the above copyright 1012120Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer; 1112120Sar4jc@virginia.edu// redistributions in binary form must reproduce the above copyright 1212120Sar4jc@virginia.edu// notice, this list of conditions and the following disclaimer in the 1312120Sar4jc@virginia.edu// documentation and/or other materials provided with the distribution; 1412120Sar4jc@virginia.edu// neither the name of the copyright holders nor the names of its 1512120Sar4jc@virginia.edu// contributors may be used to endorse or promote products derived from 1612120Sar4jc@virginia.edu// this software without specific prior written permission. 1712120Sar4jc@virginia.edu// 1812120Sar4jc@virginia.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1912120Sar4jc@virginia.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2012120Sar4jc@virginia.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2112120Sar4jc@virginia.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2212120Sar4jc@virginia.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2312120Sar4jc@virginia.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2412120Sar4jc@virginia.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2512120Sar4jc@virginia.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2612120Sar4jc@virginia.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2712120Sar4jc@virginia.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2812120Sar4jc@virginia.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2912120Sar4jc@virginia.edu// 3012120Sar4jc@virginia.edu// Authors: Alec Roelke 3112120Sar4jc@virginia.edudef format CROp(code, *opt_flags) {{ 3212120Sar4jc@virginia.edu iop = InstObjParams(name, Name, 'CompRegOp', code, opt_flags) 3312120Sar4jc@virginia.edu header_output = BasicDeclare.subst(iop) 3412120Sar4jc@virginia.edu decoder_output = BasicConstructor.subst(iop) 3512120Sar4jc@virginia.edu decode_block = BasicDecode.subst(iop) 3612120Sar4jc@virginia.edu exec_output = BasicExecute.subst(iop) 3712120Sar4jc@virginia.edu}}; 3812120Sar4jc@virginia.edu 3912428Sar4jc@virginia.edudef format CIOp(imm_code, code, imm_type='int64_t', *opt_flags) {{ 4012120Sar4jc@virginia.edu regs = ['_destRegIdx[0]','_srcRegIdx[0]'] 4112428Sar4jc@virginia.edu iop = InstObjParams(name, Name, 'ImmOp<%s>' % imm_type, 4212120Sar4jc@virginia.edu {'code': code, 'imm_code': imm_code, 4312120Sar4jc@virginia.edu 'regs': ','.join(regs)}, opt_flags) 4412120Sar4jc@virginia.edu header_output = ImmDeclare.subst(iop) 4512120Sar4jc@virginia.edu decoder_output = ImmConstructor.subst(iop) 4612120Sar4jc@virginia.edu decode_block = BasicDecode.subst(iop) 4712120Sar4jc@virginia.edu exec_output = ImmExecute.subst(iop) 4812120Sar4jc@virginia.edu}}; 4912120Sar4jc@virginia.edu 5012535Sar4jc@virginia.edudef format CBOp(code, *opt_flags) {{ 5112535Sar4jc@virginia.edu imm_code = """ 5212535Sar4jc@virginia.edu imm = CIMM5<2:1> << 1 | 5312535Sar4jc@virginia.edu CIMM3<1:0> << 3 | 5412535Sar4jc@virginia.edu CIMM5<0:0> << 5 | 5512535Sar4jc@virginia.edu CIMM5<4:3> << 6; 5612535Sar4jc@virginia.edu if (CIMM3<2:2> > 0) 5712535Sar4jc@virginia.edu imm |= ~((int64_t)0xFF); 5812535Sar4jc@virginia.edu """ 5912535Sar4jc@virginia.edu regs = ['_srcRegIdx[0]','_srcRegIdx[1]'] 6012535Sar4jc@virginia.edu iop = InstObjParams(name, Name, 'ImmOp<int64_t>', 6112535Sar4jc@virginia.edu {'code': code, 'imm_code': imm_code, 6212535Sar4jc@virginia.edu 'regs': ','.join(regs)}, opt_flags) 6312535Sar4jc@virginia.edu header_output = BranchDeclare.subst(iop) 6412535Sar4jc@virginia.edu decoder_output = ImmConstructor.subst(iop) 6512535Sar4jc@virginia.edu decode_block = BasicDecode.subst(iop) 6612535Sar4jc@virginia.edu exec_output = BranchExecute.subst(iop) 6712535Sar4jc@virginia.edu}}; 6812535Sar4jc@virginia.edu 6912120Sar4jc@virginia.edudef format CompressedLoad(ldisp_code, memacc_code, 7012120Sar4jc@virginia.edu ea_code, mem_flags=[], inst_flags=[]) {{ 7112120Sar4jc@virginia.edu (header_output, decoder_output, decode_block, exec_output) = \ 7212120Sar4jc@virginia.edu LoadStoreBase(name, Name, ldisp_code, ea_code, memacc_code, mem_flags, 7312120Sar4jc@virginia.edu inst_flags, 'Load', exec_template_base='Load') 7412120Sar4jc@virginia.edu}}; 7512120Sar4jc@virginia.edu 7612120Sar4jc@virginia.edudef format CompressedStore(sdisp_code, memacc_code, 7712120Sar4jc@virginia.edu ea_code, mem_flags=[], inst_flags=[]) {{ 7812120Sar4jc@virginia.edu (header_output, decoder_output, decode_block, exec_output) = \ 7912120Sar4jc@virginia.edu LoadStoreBase(name, Name, sdisp_code, ea_code, memacc_code, mem_flags, 8012120Sar4jc@virginia.edu inst_flags, 'Store', exec_template_base='Store') 8112120Sar4jc@virginia.edu}};