decoder.cc revision 12120
111723Sar4jc@virginia.edu/* 211723Sar4jc@virginia.edu * Copyright (c) 2012 Google 312120Sar4jc@virginia.edu * Copyright (c) The University of Virginia 411723Sar4jc@virginia.edu * All rights reserved. 511723Sar4jc@virginia.edu * 611723Sar4jc@virginia.edu * Redistribution and use in source and binary forms, with or without 711723Sar4jc@virginia.edu * modification, are permitted provided that the following conditions are 811723Sar4jc@virginia.edu * met: redistributions of source code must retain the above copyright 911723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer; 1011723Sar4jc@virginia.edu * redistributions in binary form must reproduce the above copyright 1111723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer in the 1211723Sar4jc@virginia.edu * documentation and/or other materials provided with the distribution; 1311723Sar4jc@virginia.edu * neither the name of the copyright holders nor the names of its 1411723Sar4jc@virginia.edu * contributors may be used to endorse or promote products derived from 1511723Sar4jc@virginia.edu * this software without specific prior written permission. 1611723Sar4jc@virginia.edu * 1711723Sar4jc@virginia.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1811723Sar4jc@virginia.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1911723Sar4jc@virginia.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2011723Sar4jc@virginia.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2111723Sar4jc@virginia.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2211723Sar4jc@virginia.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2311723Sar4jc@virginia.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2411723Sar4jc@virginia.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2511723Sar4jc@virginia.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2611723Sar4jc@virginia.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2711723Sar4jc@virginia.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2811723Sar4jc@virginia.edu * 2911723Sar4jc@virginia.edu * Authors: Gabe Black 3012120Sar4jc@virginia.edu * Alec Roelke 3111723Sar4jc@virginia.edu */ 3211723Sar4jc@virginia.edu 3311723Sar4jc@virginia.edu#include "arch/riscv/decoder.hh" 3412120Sar4jc@virginia.edu#include "arch/riscv/types.hh" 3512120Sar4jc@virginia.edu#include "debug/Decode.hh" 3611723Sar4jc@virginia.edu 3711723Sar4jc@virginia.edunamespace RiscvISA 3811723Sar4jc@virginia.edu{ 3911723Sar4jc@virginia.edu 4012120Sar4jc@virginia.eduvoid 4112120Sar4jc@virginia.eduDecoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 4212120Sar4jc@virginia.edu{ 4312120Sar4jc@virginia.edu DPRINTF(Decode, "Getting bytes 0x%08x from address %#x\n", 4412120Sar4jc@virginia.edu inst, pc.pc()); 4512120Sar4jc@virginia.edu 4612120Sar4jc@virginia.edu bool aligned = pc.pc() % sizeof(MachInst) == 0; 4712120Sar4jc@virginia.edu if (mid) { 4812120Sar4jc@virginia.edu assert(!aligned); 4912120Sar4jc@virginia.edu emi |= (inst & 0xFFFF) << 16; 5012120Sar4jc@virginia.edu instDone = true; 5112120Sar4jc@virginia.edu } else { 5212120Sar4jc@virginia.edu MachInst instChunk = aligned ? inst & 0xFFFF : 5312120Sar4jc@virginia.edu (inst & 0xFFFF0000) >> 16; 5412120Sar4jc@virginia.edu if (aligned) { 5512120Sar4jc@virginia.edu emi = (inst & 0x3) < 0x3 ? instChunk : inst; 5612120Sar4jc@virginia.edu instDone = true; 5712120Sar4jc@virginia.edu } else { 5812120Sar4jc@virginia.edu emi = instChunk; 5912120Sar4jc@virginia.edu instDone = (instChunk & 0x3) < 0x3; 6012120Sar4jc@virginia.edu } 6112120Sar4jc@virginia.edu } 6212120Sar4jc@virginia.edu mid = !instDone; 6312120Sar4jc@virginia.edu} 6412120Sar4jc@virginia.edu 6512120Sar4jc@virginia.eduStaticInstPtr 6612120Sar4jc@virginia.eduDecoder::decode(ExtMachInst mach_inst, Addr addr) 6712120Sar4jc@virginia.edu{ 6812120Sar4jc@virginia.edu DPRINTF(Decode, "Decoding instruction 0x%08x at address %#x\n", 6912120Sar4jc@virginia.edu mach_inst, addr); 7012120Sar4jc@virginia.edu if (instMap.find(mach_inst) != instMap.end()) 7112120Sar4jc@virginia.edu return instMap[mach_inst]; 7212120Sar4jc@virginia.edu else { 7312120Sar4jc@virginia.edu StaticInstPtr si = decodeInst(mach_inst); 7412120Sar4jc@virginia.edu instMap[mach_inst] = si; 7512120Sar4jc@virginia.edu return si; 7612120Sar4jc@virginia.edu } 7712120Sar4jc@virginia.edu} 7812120Sar4jc@virginia.edu 7912120Sar4jc@virginia.eduStaticInstPtr 8012120Sar4jc@virginia.eduDecoder::decode(RiscvISA::PCState &nextPC) 8112120Sar4jc@virginia.edu{ 8212120Sar4jc@virginia.edu if (!instDone) 8312120Sar4jc@virginia.edu return nullptr; 8412120Sar4jc@virginia.edu instDone = false; 8512120Sar4jc@virginia.edu 8612120Sar4jc@virginia.edu if ((emi & 0x3) < 0x3) { 8712120Sar4jc@virginia.edu nextPC.compressed(true); 8812120Sar4jc@virginia.edu nextPC.npc(nextPC.pc() + sizeof(MachInst)/2); 8912120Sar4jc@virginia.edu } else { 9012120Sar4jc@virginia.edu nextPC.compressed(false); 9112120Sar4jc@virginia.edu nextPC.npc(nextPC.pc() + sizeof(MachInst)); 9212120Sar4jc@virginia.edu } 9312120Sar4jc@virginia.edu 9412120Sar4jc@virginia.edu return decode(emi, nextPC.instAddr()); 9512120Sar4jc@virginia.edu} 9611723Sar4jc@virginia.edu 9711723Sar4jc@virginia.edu} 98