miscregs.hh revision 6691
1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Timothy M. Jones 29 */ 30 31#ifndef __ARCH_POWER_MISCREGS_HH__ 32#define __ARCH_POWER_MISCREGS_HH__ 33 34#include "base/bitunion.hh" 35 36namespace PowerISA 37{ 38 39enum MiscRegIndex { 40 NUM_MISCREGS = 0 41}; 42 43const char * const miscRegName[NUM_MISCREGS] = { 44}; 45 46BitUnion32(Cr) 47 Bitfield<31,28> cr0; 48 Bitfield<27,24> cr1; 49EndBitUnion(Cr) 50 51BitUnion32(Xer) 52 Bitfield<31> so; 53 Bitfield<30> ov; 54 Bitfield<29> ca; 55EndBitUnion(Xer) 56 57BitUnion32(Fpscr) 58 Bitfield<31> fx; 59 Bitfield<30> fex; 60 Bitfield<29> vx; 61 Bitfield<28> ox; 62 Bitfield<27> ux; 63 Bitfield<26> zx; 64 Bitfield<25> xx; 65 Bitfield<24> vxsnan; 66 Bitfield<23> vxisi; 67 Bitfield<22> vxidi; 68 Bitfield<21> vxzdz; 69 Bitfield<20> vximz; 70 Bitfield<19> vxvc; 71 Bitfield<18> fr; 72 Bitfield<17> fi; 73 SubBitUnion(fprf, 16, 12) 74 Bitfield<16> c; 75 SubBitUnion(fpcc, 15, 12) 76 Bitfield<15> fl; 77 Bitfield<14> fg; 78 Bitfield<13> fe; 79 Bitfield<12> fu; 80 EndSubBitUnion(fpcc) 81 EndSubBitUnion(fprf) 82 Bitfield<10> vxsqrt; 83 Bitfield<9> vxcvi; 84 Bitfield<8> ve; 85 Bitfield<7> oe; 86 Bitfield<6> ue; 87 Bitfield<5> ze; 88 Bitfield<4> xe; 89 Bitfield<3> ni; 90 Bitfield<2,1> rn; 91EndBitUnion(Fpscr) 92 93}; // PowerISA namespace 94 95#endif // __ARCH_POWER_MISCREGS_HH__ 96