interrupts.hh revision 11566:b11410957c9e
111841Sandreas.sandberg@arm.com/* 27090SN/A * Copyright (c) 2011 Google 37090SN/A * All rights reserved. 47090SN/A * 57090SN/A * Redistribution and use in source and binary forms, with or without 67090SN/A * modification, are permitted provided that the following conditions are 77090SN/A * met: redistributions of source code must retain the above copyright 87090SN/A * notice, this list of conditions and the following disclaimer; 97090SN/A * redistributions in binary form must reproduce the above copyright 107090SN/A * notice, this list of conditions and the following disclaimer in the 117090SN/A * documentation and/or other materials provided with the distribution; 127090SN/A * neither the name of the copyright holders nor the names of its 134486SN/A * contributors may be used to endorse or promote products derived from 144486SN/A * this software without specific prior written permission. 154486SN/A * 164486SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174486SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184486SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194486SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204486SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214486SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224486SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234486SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244486SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254486SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264486SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274486SN/A * 284486SN/A * Authors: Gabe Black 294486SN/A */ 304486SN/A 314486SN/A#ifndef __ARCH_POWER_INTERRUPT_HH__ 324486SN/A#define __ARCH_POWER_INTERRUPT_HH__ 334486SN/A 344486SN/A#include "base/misc.hh" 354486SN/A#include "params/PowerInterrupts.hh" 364486SN/A#include "sim/sim_object.hh" 374486SN/A 384486SN/Aclass ThreadContext; 397584SAli.Saidi@arm.com 407584SAli.Saidi@arm.comnamespace PowerISA { 417754SWilliam.Wang@arm.com 424486SN/Aclass Interrupts : public SimObject 433630SN/A{ 443630SN/A private: 4511011SAndreas.Sandberg@ARM.com BaseCPU * cpu; 4611011SAndreas.Sandberg@ARM.com 477587SAli.Saidi@arm.com public: 4811244Sandreas.sandberg@arm.com typedef PowerInterruptsParams Params; 4910353SGeoffrey.Blake@arm.com 508212SAli.Saidi@ARM.com const Params * 515478SN/A params() const 525478SN/A { 537584SAli.Saidi@arm.com return dynamic_cast<const Params *>(_params); 548931Sandreas.hansson@arm.com } 559525SAndreas.Sandberg@ARM.com 5610397Sstephan.diestelhorst@arm.com Interrupts(Params * p) : SimObject(p), cpu(NULL) 5711090Sandreas.sandberg@arm.com {} 5811236Sandreas.sandberg@arm.com 593630SN/A void 6011841Sandreas.sandberg@arm.com setCPU(BaseCPU * _cpu) 6111841Sandreas.sandberg@arm.com { 6211841Sandreas.sandberg@arm.com cpu = _cpu; 6311841Sandreas.sandberg@arm.com } 6411841Sandreas.sandberg@arm.com 6511841Sandreas.sandberg@arm.com void 6611841Sandreas.sandberg@arm.com post(int int_num, int index) 6711841Sandreas.sandberg@arm.com { 6811841Sandreas.sandberg@arm.com panic("Interrupts::post not implemented.\n"); 6911841Sandreas.sandberg@arm.com } 7011841Sandreas.sandberg@arm.com 7111841Sandreas.sandberg@arm.com void 729806Sstever@gmail.com clear(int int_num, int index) 739806Sstever@gmail.com { 747584SAli.Saidi@arm.com panic("Interrupts::clear not implemented.\n"); 759338SAndreas.Sandberg@arm.com } 767584SAli.Saidi@arm.com 773898SN/A void 789806Sstever@gmail.com clearAll() 797950SAli.Saidi@ARM.com { 807950SAli.Saidi@ARM.com panic("Interrupts::clearAll not implemented.\n"); 819338SAndreas.Sandberg@arm.com } 829525SAndreas.Sandberg@ARM.com 837950SAli.Saidi@ARM.com bool 847950SAli.Saidi@ARM.com checkInterrupts(ThreadContext *tc) const 857950SAli.Saidi@ARM.com { 867950SAli.Saidi@ARM.com panic("Interrupts::checkInterrupts not implemented.\n"); 877587SAli.Saidi@arm.com } 887587SAli.Saidi@arm.com 897587SAli.Saidi@arm.com Fault 909338SAndreas.Sandberg@arm.com getInterrupt(ThreadContext *tc) 917753SWilliam.Wang@arm.com { 927753SWilliam.Wang@arm.com assert(checkInterrupts(tc)); 939525SAndreas.Sandberg@ARM.com panic("Interrupts::getInterrupt not implemented.\n"); 947753SWilliam.Wang@arm.com } 957587SAli.Saidi@arm.com 967587SAli.Saidi@arm.com void 978282SAli.Saidi@ARM.com updateIntrInfo(ThreadContext *tc) 988282SAli.Saidi@ARM.com { 999338SAndreas.Sandberg@arm.com panic("Interrupts::updateIntrInfo not implemented.\n"); 1008282SAli.Saidi@ARM.com } 10111296Sandreas.sandberg@arm.com}; 10211296Sandreas.sandberg@arm.com 10311296Sandreas.sandberg@arm.com} // namespace PowerISA 10411296Sandreas.sandberg@arm.com 10511296Sandreas.sandberg@arm.com#endif // __ARCH_POWER_INTERRUPT_HH__ 10611296Sandreas.sandberg@arm.com 10711296Sandreas.sandberg@arm.com