decoder.hh revision 11165
18839Sandreas.hansson@arm.com/* 28839Sandreas.hansson@arm.com * Copyright (c) 2012 Google 38839Sandreas.hansson@arm.com * All rights reserved. 48839Sandreas.hansson@arm.com * 58839Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68839Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78839Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88839Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98839Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108839Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118839Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128839Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 135647Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 145647Sgblack@eecs.umich.edu * this software without specific prior written permission. 155647Sgblack@eecs.umich.edu * 165647Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175647Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185647Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195647Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205647Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215647Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225647Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235647Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245647Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255647Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265647Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275647Sgblack@eecs.umich.edu * 285647Sgblack@eecs.umich.edu * Authors: Gabe Black 295647Sgblack@eecs.umich.edu */ 305647Sgblack@eecs.umich.edu 315647Sgblack@eecs.umich.edu#ifndef __ARCH_POWER_DECODER_HH__ 325647Sgblack@eecs.umich.edu#define __ARCH_POWER_DECODER_HH__ 335647Sgblack@eecs.umich.edu 345647Sgblack@eecs.umich.edu#include "arch/generic/decode_cache.hh" 355647Sgblack@eecs.umich.edu#include "arch/types.hh" 365647Sgblack@eecs.umich.edu#include "cpu/static_inst.hh" 375647Sgblack@eecs.umich.edu 385647Sgblack@eecs.umich.edunamespace PowerISA 395647Sgblack@eecs.umich.edu{ 405647Sgblack@eecs.umich.edu 418742Sgblack@eecs.umich.educlass ISA; 425647Sgblack@eecs.umich.educlass Decoder 438742Sgblack@eecs.umich.edu{ 4413665Sandreas.sandberg@arm.com protected: 4513665Sandreas.sandberg@arm.com // The extended machine instruction being generated 4614145Sgabeblack@google.com ExtMachInst emi; 475647Sgblack@eecs.umich.edu bool instDone; 485647Sgblack@eecs.umich.edu 495647Sgblack@eecs.umich.edu public: 505647Sgblack@eecs.umich.edu Decoder(ISA* isa = nullptr) : instDone(false) 519338SAndreas.Sandberg@arm.com { 528839Sandreas.hansson@arm.com } 538839Sandreas.hansson@arm.com 547900Shestness@cs.utexas.edu void 557900Shestness@cs.utexas.edu process() 5614145Sgabeblack@google.com { 5714145Sgabeblack@google.com } 5814145Sgabeblack@google.com 5914145Sgabeblack@google.com void 6014145Sgabeblack@google.com reset() 6114145Sgabeblack@google.com { 6214145Sgabeblack@google.com instDone = false; 6314145Sgabeblack@google.com } 6414145Sgabeblack@google.com 6514145Sgabeblack@google.com // Use this to give data to the predecoder. This should be used 6614145Sgabeblack@google.com // when there is control flow. 6714145Sgabeblack@google.com void 68 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 69 { 70 emi = inst; 71 instDone = true; 72 } 73 74 // Use this to give data to the predecoder. This should be used 75 // when instructions are executed in order. 76 void 77 moreBytes(MachInst machInst) 78 { 79 moreBytes(0, 0, machInst); 80 } 81 82 bool 83 needMoreBytes() 84 { 85 return true; 86 } 87 88 bool 89 instReady() 90 { 91 return instDone; 92 } 93 94 void takeOverFrom(Decoder *old) {} 95 96 protected: 97 /// A cache of decoded instruction objects. 98 static GenericISA::BasicDecodeCache defaultCache; 99 100 public: 101 StaticInstPtr decodeInst(ExtMachInst mach_inst); 102 103 /// Decode a machine instruction. 104 /// @param mach_inst The binary instruction to decode. 105 /// @retval A pointer to the corresponding StaticInst object. 106 StaticInstPtr 107 decode(ExtMachInst mach_inst, Addr addr) 108 { 109 return defaultCache.decode(this, mach_inst, addr); 110 } 111 112 StaticInstPtr 113 decode(PowerISA::PCState &nextPC) 114 { 115 if (!instDone) 116 return NULL; 117 instDone = false; 118 return decode(emi, nextPC.instAddr()); 119 } 120}; 121 122} // namespace PowerISA 123 124#endif // __ARCH_POWER_DECODER_HH__ 125