decoder.hh revision 9023
19020Sgblack@eecs.umich.edu/*
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279020Sgblack@eecs.umich.edu *
289020Sgblack@eecs.umich.edu * Authors: Gabe Black
299020Sgblack@eecs.umich.edu */
309020Sgblack@eecs.umich.edu
319020Sgblack@eecs.umich.edu#ifndef __ARCH_POWER_DECODER_HH__
329020Sgblack@eecs.umich.edu#define __ARCH_POWER_DECODER_HH__
339020Sgblack@eecs.umich.edu
349022Sgblack@eecs.umich.edu#include "arch/types.hh"
359022Sgblack@eecs.umich.edu#include "cpu/decode_cache.hh"
369022Sgblack@eecs.umich.edu#include "cpu/static_inst_fwd.hh"
379020Sgblack@eecs.umich.edu
389020Sgblack@eecs.umich.edunamespace PowerISA
399020Sgblack@eecs.umich.edu{
409020Sgblack@eecs.umich.edu
419022Sgblack@eecs.umich.educlass Decoder
429022Sgblack@eecs.umich.edu{
439022Sgblack@eecs.umich.edu  protected:
449023Sgblack@eecs.umich.edu    ThreadContext * tc;
459023Sgblack@eecs.umich.edu
469023Sgblack@eecs.umich.edu    // The extended machine instruction being generated
479023Sgblack@eecs.umich.edu    ExtMachInst emi;
489023Sgblack@eecs.umich.edu    bool instDone;
499023Sgblack@eecs.umich.edu
509023Sgblack@eecs.umich.edu  public:
519023Sgblack@eecs.umich.edu    Decoder(ThreadContext * _tc) : tc(_tc), instDone(false)
529023Sgblack@eecs.umich.edu    {
539023Sgblack@eecs.umich.edu    }
549023Sgblack@eecs.umich.edu
559023Sgblack@eecs.umich.edu    ThreadContext *
569023Sgblack@eecs.umich.edu    getTC()
579023Sgblack@eecs.umich.edu    {
589023Sgblack@eecs.umich.edu        return tc;
599023Sgblack@eecs.umich.edu    }
609023Sgblack@eecs.umich.edu
619023Sgblack@eecs.umich.edu    void
629023Sgblack@eecs.umich.edu    setTC(ThreadContext * _tc)
639023Sgblack@eecs.umich.edu    {
649023Sgblack@eecs.umich.edu        tc = _tc;
659023Sgblack@eecs.umich.edu    }
669023Sgblack@eecs.umich.edu
679023Sgblack@eecs.umich.edu    void
689023Sgblack@eecs.umich.edu    process()
699023Sgblack@eecs.umich.edu    {
709023Sgblack@eecs.umich.edu    }
719023Sgblack@eecs.umich.edu
729023Sgblack@eecs.umich.edu    void
739023Sgblack@eecs.umich.edu    reset()
749023Sgblack@eecs.umich.edu    {
759023Sgblack@eecs.umich.edu        instDone = false;
769023Sgblack@eecs.umich.edu    }
779023Sgblack@eecs.umich.edu
789023Sgblack@eecs.umich.edu    // Use this to give data to the predecoder. This should be used
799023Sgblack@eecs.umich.edu    // when there is control flow.
809023Sgblack@eecs.umich.edu    void
819023Sgblack@eecs.umich.edu    moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
829023Sgblack@eecs.umich.edu    {
839023Sgblack@eecs.umich.edu        emi = inst;
849023Sgblack@eecs.umich.edu        instDone = true;
859023Sgblack@eecs.umich.edu    }
869023Sgblack@eecs.umich.edu
879023Sgblack@eecs.umich.edu    // Use this to give data to the predecoder. This should be used
889023Sgblack@eecs.umich.edu    // when instructions are executed in order.
899023Sgblack@eecs.umich.edu    void
909023Sgblack@eecs.umich.edu    moreBytes(MachInst machInst)
919023Sgblack@eecs.umich.edu    {
929023Sgblack@eecs.umich.edu        moreBytes(0, 0, machInst);
939023Sgblack@eecs.umich.edu    }
949023Sgblack@eecs.umich.edu
959023Sgblack@eecs.umich.edu    bool
969023Sgblack@eecs.umich.edu    needMoreBytes()
979023Sgblack@eecs.umich.edu    {
989023Sgblack@eecs.umich.edu        return true;
999023Sgblack@eecs.umich.edu    }
1009023Sgblack@eecs.umich.edu
1019023Sgblack@eecs.umich.edu    bool
1029023Sgblack@eecs.umich.edu    instReady()
1039023Sgblack@eecs.umich.edu    {
1049023Sgblack@eecs.umich.edu        return instDone;
1059023Sgblack@eecs.umich.edu    }
1069023Sgblack@eecs.umich.edu  protected:
1079022Sgblack@eecs.umich.edu    /// A cache of decoded instruction objects.
1089022Sgblack@eecs.umich.edu    static DecodeCache defaultCache;
1099022Sgblack@eecs.umich.edu
1109022Sgblack@eecs.umich.edu  public:
1119022Sgblack@eecs.umich.edu    StaticInstPtr decodeInst(ExtMachInst mach_inst);
1129022Sgblack@eecs.umich.edu
1139022Sgblack@eecs.umich.edu    /// Decode a machine instruction.
1149022Sgblack@eecs.umich.edu    /// @param mach_inst The binary instruction to decode.
1159022Sgblack@eecs.umich.edu    /// @retval A pointer to the corresponding StaticInst object.
1169022Sgblack@eecs.umich.edu    StaticInstPtr
1179022Sgblack@eecs.umich.edu    decode(ExtMachInst mach_inst, Addr addr)
1189022Sgblack@eecs.umich.edu    {
1199022Sgblack@eecs.umich.edu        return defaultCache.decode(this, mach_inst, addr);
1209022Sgblack@eecs.umich.edu    }
1219023Sgblack@eecs.umich.edu
1229023Sgblack@eecs.umich.edu    StaticInstPtr
1239023Sgblack@eecs.umich.edu    decode(PowerISA::PCState &nextPC)
1249023Sgblack@eecs.umich.edu    {
1259023Sgblack@eecs.umich.edu        if (!instDone)
1269023Sgblack@eecs.umich.edu            return NULL;
1279023Sgblack@eecs.umich.edu        instDone = false;
1289023Sgblack@eecs.umich.edu        return decode(emi, nextPC.instAddr());
1299023Sgblack@eecs.umich.edu    }
1309022Sgblack@eecs.umich.edu};
1319020Sgblack@eecs.umich.edu
1329020Sgblack@eecs.umich.edu} // namespace PowerISA
1339020Sgblack@eecs.umich.edu
1349020Sgblack@eecs.umich.edu#endif // __ARCH_POWER_DECODER_HH__
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